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drm/vc4: hdmi: Replace hardcoded value by define
author
Maxime Ripard
<maxime@cerno.tech>
Thu, 26 Jan 2023 17:05:46 +0000
(18:05 +0100)
committer
Maxime Ripard
<maxime@cerno.tech>
Thu, 16 Feb 2023 09:24:10 +0000
(10:24 +0100)
The 120MHz value hardcoded in the call to max_t to compute the HSM rate
is defined in the driver as HSM_MIN_CLOCK_FREQ, let's switch to it so
that it's more readable.
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Link:
https://lore.kernel.org/r/20230126-rpi-display-fw-clk-cleanup-v1-1-d646ff6fb842@cerno.tech
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
drivers/gpu/drm/vc4/vc4_hdmi.c
patch
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diff --git
a/drivers/gpu/drm/vc4/vc4_hdmi.c
b/drivers/gpu/drm/vc4/vc4_hdmi.c
index
1462886
..
98fa306
100644
(file)
--- a/
drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/
drivers/gpu/drm/vc4/vc4_hdmi.c
@@
-1482,7
+1482,9
@@
static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder,
* Additionally, the AXI clock needs to be at least 25% of
* pixel clock, but HSM ends up being the limiting factor.
*/
- hsm_rate = max_t(unsigned long, 120000000, (tmds_char_rate / 100) * 101);
+ hsm_rate = max_t(unsigned long,
+ HSM_MIN_CLOCK_FREQ,
+ (tmds_char_rate / 100) * 101);
ret = clk_set_min_rate(vc4_hdmi->hsm_clock, hsm_rate);
if (ret) {
DRM_ERROR("Failed to set HSM clock rate: %d\n", ret);