scr_set := 0;
addr_set := 0;
if (addr_inc = 1) then
- reg_ppu_addr <= reg_ppu_addr + 1;
+ if (reg_ppu_ctrl(PPUVAI) = '1') then
+ reg_ppu_addr <= reg_ppu_addr + 32;
+ else
+ reg_ppu_addr <= reg_ppu_addr + 1;
+ end if;
addr_inc := 0;
end if;
if (oam_addr_inc = 1) then
##sprite\r
#run 550 us\r
\r
-#until nmi 0x15\r
-run 435ms\r
+#until nmi 0x08 end.\r
+run 230ms\r
+\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-08-sim-ram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/cpu_ram_inst/work_ram\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-08-sim-vram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/vram_nt0_inst/work_ram\r
+\r
+run 16.8ms\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-09-sim-ram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/cpu_ram_inst/work_ram\r
+mem save -o D:/daisuke/nes/repo/motonesfpga/doc/dbg/sim-dump/after-09-sim-vram.mem -f mti -data hex -addr hex -wordsperline 16 /testbench_motones_sim/sim_board/vram_nt0_inst/work_ram\r
+\r