drm/i915: Refactor bdw_get_pipemisc_bpp

Move bdw_get_pipemisc_bpp alongside bdw_set_pipemisc

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1556809862-31203-2-git-send-email-vandita.kulkarni@intel.com

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b66acfc..8f3c389 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8961,6 +8961,28 @@ static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state)
        I915_WRITE(PIPEMISC(crtc->pipe), val);
 }
 
+int bdw_get_pipemisc_bpp(struct intel_crtc *crtc)
+{
+       struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+       u32 tmp;
+
+       tmp = I915_READ(PIPEMISC(crtc->pipe));
+
+       switch (tmp & PIPEMISC_DITHER_BPC_MASK) {
+       case PIPEMISC_DITHER_6_BPC:
+               return 18;
+       case PIPEMISC_DITHER_8_BPC:
+               return 24;
+       case PIPEMISC_DITHER_10_BPC:
+               return 30;
+       case PIPEMISC_DITHER_12_BPC:
+               return 36;
+       default:
+               MISSING_CASE(tmp);
+               return 0;
+       }
+}
+
 int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp)
 {
        /*

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 247893e..5258abb 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1617,6 +1617,7 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha);
 unsigned int i9xx_plane_max_stride(struct intel_plane *plane,
                                   u32 pixel_format, u64 modifier,
                                   unsigned int rotation);
+int bdw_get_pipemisc_bpp(struct intel_crtc *crtc);
 
 /* intel_runtime_pm.c */
 static inline void

diff --git a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c
index bc5b782..895ea1a 100644 (file)
--- a/drivers/gpu/drm/i915/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/vlv_dsi.c
@@ -262,28 +262,6 @@ static void band_gap_reset(struct drm_i915_private *dev_priv)
        vlv_flisdsi_put(dev_priv);
 }
 
-static int bdw_get_pipemisc_bpp(struct intel_crtc *crtc)
-{
-       struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-       u32 tmp;
-
-       tmp = I915_READ(PIPEMISC(crtc->pipe));
-
-       switch (tmp & PIPEMISC_DITHER_BPC_MASK) {
-       case PIPEMISC_DITHER_6_BPC:
-               return 18;
-       case PIPEMISC_DITHER_8_BPC:
-               return 24;
-       case PIPEMISC_DITHER_10_BPC:
-               return 30;
-       case PIPEMISC_DITHER_12_BPC:
-               return 36;
-       default:
-               MISSING_CASE(tmp);
-               return 0;
-       }
-}
-
 static int intel_dsi_compute_config(struct intel_encoder *encoder,
                                    struct intel_crtc_state *pipe_config,
                                    struct drm_connector_state *conn_state)