mfd: da9063: Use REGMAP_IRQ_REG

Convert the regmap_irq table to use REGMAP_IRQ_REG().

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: Steve Twiss <stwiss.opensource@diasemi.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

diff --git a/drivers/mfd/da9063-irq.c b/drivers/mfd/da9063-irq.c
index da6ceb4..044bd86 100644 (file)
--- a/drivers/mfd/da9063-irq.c
+++ b/drivers/mfd/da9063-irq.c
@@ -28,132 +28,73 @@
 
 static const struct regmap_irq da9063_irqs[] = {
        /* DA9063 event A register */
-       [DA9063_IRQ_ONKEY] = {
-               .reg_offset = DA9063_REG_EVENT_A_OFFSET,
-               .mask = DA9063_M_ONKEY,
-       },
-       [DA9063_IRQ_ALARM] = {
-               .reg_offset = DA9063_REG_EVENT_A_OFFSET,
-               .mask = DA9063_M_ALARM,
-       },
-       [DA9063_IRQ_TICK] = {
-               .reg_offset = DA9063_REG_EVENT_A_OFFSET,
-               .mask = DA9063_M_TICK,
-       },
-       [DA9063_IRQ_ADC_RDY] = {
-               .reg_offset = DA9063_REG_EVENT_A_OFFSET,
-               .mask = DA9063_M_ADC_RDY,
-       },
-       [DA9063_IRQ_SEQ_RDY] = {
-               .reg_offset = DA9063_REG_EVENT_A_OFFSET,
-               .mask = DA9063_M_SEQ_RDY,
-       },
+       REGMAP_IRQ_REG(DA9063_IRQ_ONKEY,
+                      DA9063_REG_EVENT_A_OFFSET, DA9063_M_ONKEY),
+       REGMAP_IRQ_REG(DA9063_IRQ_ALARM,
+                      DA9063_REG_EVENT_A_OFFSET, DA9063_M_ALARM),
+       REGMAP_IRQ_REG(DA9063_IRQ_TICK,
+                      DA9063_REG_EVENT_A_OFFSET, DA9063_M_TICK),
+       REGMAP_IRQ_REG(DA9063_IRQ_ADC_RDY,
+                      DA9063_REG_EVENT_A_OFFSET, DA9063_M_ADC_RDY),
+       REGMAP_IRQ_REG(DA9063_IRQ_SEQ_RDY,
+                      DA9063_REG_EVENT_A_OFFSET, DA9063_M_SEQ_RDY),
        /* DA9063 event B register */
-       [DA9063_IRQ_WAKE] = {
-               .reg_offset = DA9063_REG_EVENT_B_OFFSET,
-               .mask = DA9063_M_WAKE,
-       },
-       [DA9063_IRQ_TEMP] = {
-               .reg_offset = DA9063_REG_EVENT_B_OFFSET,
-               .mask = DA9063_M_TEMP,
-       },
-       [DA9063_IRQ_COMP_1V2] = {
-               .reg_offset = DA9063_REG_EVENT_B_OFFSET,
-               .mask = DA9063_M_COMP_1V2,
-       },
-       [DA9063_IRQ_LDO_LIM] = {
-               .reg_offset = DA9063_REG_EVENT_B_OFFSET,
-               .mask = DA9063_M_LDO_LIM,
-       },
-       [DA9063_IRQ_REG_UVOV] = {
-               .reg_offset = DA9063_REG_EVENT_B_OFFSET,
-               .mask = DA9063_M_UVOV,
-       },
-       [DA9063_IRQ_DVC_RDY] = {
-               .reg_offset = DA9063_REG_EVENT_B_OFFSET,
-               .mask = DA9063_M_DVC_RDY,
-       },
-       [DA9063_IRQ_VDD_MON] = {
-               .reg_offset = DA9063_REG_EVENT_B_OFFSET,
-               .mask = DA9063_M_VDD_MON,
-       },
-       [DA9063_IRQ_WARN] = {
-               .reg_offset = DA9063_REG_EVENT_B_OFFSET,
-               .mask = DA9063_M_VDD_WARN,
-       },
+       REGMAP_IRQ_REG(DA9063_IRQ_WAKE,
+                      DA9063_REG_EVENT_B_OFFSET, DA9063_M_WAKE),
+       REGMAP_IRQ_REG(DA9063_IRQ_TEMP,
+                      DA9063_REG_EVENT_B_OFFSET, DA9063_M_TEMP),
+       REGMAP_IRQ_REG(DA9063_IRQ_COMP_1V2,
+                      DA9063_REG_EVENT_B_OFFSET, DA9063_M_COMP_1V2),
+       REGMAP_IRQ_REG(DA9063_IRQ_LDO_LIM,
+                      DA9063_REG_EVENT_B_OFFSET, DA9063_M_LDO_LIM),
+       REGMAP_IRQ_REG(DA9063_IRQ_REG_UVOV,
+                      DA9063_REG_EVENT_B_OFFSET, DA9063_M_UVOV),
+       REGMAP_IRQ_REG(DA9063_IRQ_DVC_RDY,
+                      DA9063_REG_EVENT_B_OFFSET, DA9063_M_DVC_RDY),
+       REGMAP_IRQ_REG(DA9063_IRQ_VDD_MON,
+                      DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_MON),
+       REGMAP_IRQ_REG(DA9063_IRQ_WARN,
+                      DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_WARN),
        /* DA9063 event C register */
-       [DA9063_IRQ_GPI0] = {
-               .reg_offset = DA9063_REG_EVENT_C_OFFSET,
-               .mask = DA9063_M_GPI0,
-       },
-       [DA9063_IRQ_GPI1] = {
-               .reg_offset = DA9063_REG_EVENT_C_OFFSET,
-               .mask = DA9063_M_GPI1,
-       },
-       [DA9063_IRQ_GPI2] = {
-               .reg_offset = DA9063_REG_EVENT_C_OFFSET,
-               .mask = DA9063_M_GPI2,
-       },
-       [DA9063_IRQ_GPI3] = {
-               .reg_offset = DA9063_REG_EVENT_C_OFFSET,
-               .mask = DA9063_M_GPI3,
-       },
-       [DA9063_IRQ_GPI4] = {
-               .reg_offset = DA9063_REG_EVENT_C_OFFSET,
-               .mask = DA9063_M_GPI4,
-       },
-       [DA9063_IRQ_GPI5] = {
-               .reg_offset = DA9063_REG_EVENT_C_OFFSET,
-               .mask = DA9063_M_GPI5,
-       },
-       [DA9063_IRQ_GPI6] = {
-               .reg_offset = DA9063_REG_EVENT_C_OFFSET,
-               .mask = DA9063_M_GPI6,
-       },
-       [DA9063_IRQ_GPI7] = {
-               .reg_offset = DA9063_REG_EVENT_C_OFFSET,
-               .mask = DA9063_M_GPI7,
-       },
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI0,
+                      DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI0),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI1,
+                      DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI1),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI2,
+                      DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI2),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI3,
+                      DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI3),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI4,
+                      DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI4),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI5,
+                      DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI5),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI6,
+                      DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI6),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI7,
+                      DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI7),
        /* DA9063 event D register */
-       [DA9063_IRQ_GPI8] = {
-               .reg_offset = DA9063_REG_EVENT_D_OFFSET,
-               .mask = DA9063_M_GPI8,
-       },
-       [DA9063_IRQ_GPI9] = {
-               .reg_offset = DA9063_REG_EVENT_D_OFFSET,
-               .mask = DA9063_M_GPI9,
-       },
-       [DA9063_IRQ_GPI10] = {
-               .reg_offset = DA9063_REG_EVENT_D_OFFSET,
-               .mask = DA9063_M_GPI10,
-       },
-       [DA9063_IRQ_GPI11] = {
-               .reg_offset = DA9063_REG_EVENT_D_OFFSET,
-               .mask = DA9063_M_GPI11,
-       },
-       [DA9063_IRQ_GPI12] = {
-               .reg_offset = DA9063_REG_EVENT_D_OFFSET,
-               .mask = DA9063_M_GPI12,
-       },
-       [DA9063_IRQ_GPI13] = {
-               .reg_offset = DA9063_REG_EVENT_D_OFFSET,
-               .mask = DA9063_M_GPI13,
-       },
-       [DA9063_IRQ_GPI14] = {
-               .reg_offset = DA9063_REG_EVENT_D_OFFSET,
-               .mask = DA9063_M_GPI14,
-       },
-       [DA9063_IRQ_GPI15] = {
-               .reg_offset = DA9063_REG_EVENT_D_OFFSET,
-               .mask = DA9063_M_GPI15,
-       },
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI8,
+                      DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI8),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI9,
+                      DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI9),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI10,
+                      DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI10),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI11,
+                      DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI11),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI12,
+                      DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI12),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI13,
+                      DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI13),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI14,
+                      DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI14),
+       REGMAP_IRQ_REG(DA9063_IRQ_GPI15,
+                      DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI15),
 };
 
 static const struct regmap_irq_chip da9063_irq_chip = {
        .name = "da9063-irq",
        .irqs = da9063_irqs,
        .num_irqs = DA9063_NUM_IRQ,
-
        .num_regs = 4,
        .status_base = DA9063_REG_EVENT_A,
        .mask_base = DA9063_REG_IRQ_MASK_A,