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drm/amd/amdgpu: Clean up psp reload_quirk()
authorTom St Denis <tom.stdenis@amd.com>
Tue, 4 Apr 2017 15:40:13 +0000 (11:40 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 6 Apr 2017 17:27:19 +0000 (13:27 -0400)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

index 0900fdf..c3588d1 100644 (file)
@@ -508,14 +508,10 @@ bool psp_v3_1_compare_sram_data(struct psp_context *psp,
 bool psp_v3_1_smu_reload_quirk(struct psp_context *psp)
 {
        struct amdgpu_device *adev = psp->adev;
-       uint32_t reg, reg_val;
+       uint32_t reg;
 
-       reg_val = (smnMP1_FIRMWARE_FLAGS & 0xffffffff) | 0x03b00000;
-       WREG32(SOC15_REG_OFFSET(NBIO, 0, mmPCIE_INDEX2), reg_val);
+       reg = smnMP1_FIRMWARE_FLAGS | 0x03b00000;
+       WREG32(SOC15_REG_OFFSET(NBIO, 0, mmPCIE_INDEX2), reg);
        reg = RREG32(SOC15_REG_OFFSET(NBIO, 0, mmPCIE_DATA2));
-       if ((reg & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) >>
-            MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT)
-               return true;
-
-       return false;
+       return (reg & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) ? true : false;
 }