[X86][SSE] Regenerate merge store tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305910 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/vector-merge-store-fp-constants.ll b/test/CodeGen/X86/vector-merge-store-fp-constants.ll
index a6fb32d..94fd4df 100644 (file)
--- a/test/CodeGen/X86/vector-merge-store-fp-constants.ll
+++ b/test/CodeGen/X86/vector-merge-store-fp-constants.ll
@@ -1,20 +1,22 @@
-; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefix=DEFAULTCPU -check-prefix=ALL %s
-; RUN: llc -march=x86-64 -mcpu=x86-64 -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefix=X8664CPU -check-prefix=ALL %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=DEFAULTCPU
+; RUN: llc < %s -mcpu=x86-64 -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64CPU
 
-
-; ALL-LABEL: {{^}}merge_8_float_zero_stores:
-
-; DEFAULTCPU-DAG: movq $0, ([[PTR:%[a-z]+]])
-; DEFAULTCPU-DAG: movq $0, 8([[PTR]])
-; DEFAULTCPU-DAG: movq $0, 16([[PTR]])
-; DEFAULTCPU-DAG: movq $0, 24([[PTR]])
-
-; X8664CPU: xorps [[ZEROREG:%xmm[0-9]+]], [[ZEROREG]]
-; X8664CPU-DAG: movups [[ZEROREG]], ([[PTR:%[a-z]+]])
-; X8664CPU-DAG: movups [[ZEROREG]], 16([[PTR:%[a-z]+]])
-
-; ALL: retq
 define void @merge_8_float_zero_stores(float* %ptr) {
+; DEFAULTCPU-LABEL: merge_8_float_zero_stores:
+; DEFAULTCPU:       # BB#0:
+; DEFAULTCPU-NEXT:    movq $0, (%rdi)
+; DEFAULTCPU-NEXT:    movq $0, 8(%rdi)
+; DEFAULTCPU-NEXT:    movq $0, 16(%rdi)
+; DEFAULTCPU-NEXT:    movq $0, 24(%rdi)
+; DEFAULTCPU-NEXT:    retq
+;
+; X64CPU-LABEL: merge_8_float_zero_stores:
+; X64CPU:       # BB#0:
+; X64CPU-NEXT:    xorps %xmm0, %xmm0
+; X64CPU-NEXT:    movups %xmm0, (%rdi)
+; X64CPU-NEXT:    movups %xmm0, 16(%rdi)
+; X64CPU-NEXT:    retq
   %idx0 = getelementptr float, float* %ptr, i64 0
   %idx1 = getelementptr float, float* %ptr, i64 1
   %idx2 = getelementptr float, float* %ptr, i64 2