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drm/amdgpu: indirect register access for nv12 sriov
author
Peng Ju Zhou
<PengJu.Zhou@amd.com>
Wed, 31 Mar 2021 03:19:02 +0000
(11:19 +0800)
committer
Alex Deucher
<alexander.deucher@amd.com>
Fri, 9 Apr 2021 20:50:06 +0000
(16:50 -0400)
unify host driver and guest driver indirect access
control bits names
Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com>
Reviewed-by: Emily.Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
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diff --git
a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index
097af4d
..
3580a74
100644
(file)
--- a/
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@
-110,11
+110,11
@@
enum AMDGIM_FEATURE_FLAG {
enum AMDGIM_REG_ACCESS_FLAG {
/* Use PSP to program IH_RB_CNTL */
- AMDGIM_FEATURE_IH_REG_PSP_EN = (1 << 0),
+ AMDGIM_FEATURE_IH_REG_PSP_EN
= (1 << 0),
/* Use RLC to program MMHUB regs */
- AMDGIM_FEATURE_
RLC_MMHUB
_EN = (1 << 1),
+ AMDGIM_FEATURE_
MMHUB_REG_RLC
_EN = (1 << 1),
/* Use RLC to program GC regs */
- AMDGIM_FEATURE_
RLC_G
C_EN = (1 << 2),
+ AMDGIM_FEATURE_
GC_REG_RL
C_EN = (1 << 2),
};
struct amdgim_pf2vf_info_v1 {