+2010-05-11 Jie Zhang <jie@codesourcery.com>
+
+ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Merge
+ Tag_ABI_HardFP_use correctly.
+
2010-05-11 Alan Modra <amodra@gmail.com>
* coffcode.h (coff_write_object_contents): Enclose all occurrences
break;
case Tag_FP_arch:
{
+ /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
+ the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
+ when it's 0. It might mean absence of FP hardware if
+ Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
+
static const struct
{
int ver;
int regs;
int newval;
+ /* If the output has no requirement about FP hardware,
+ follow the requirement of the input. */
+ if (out_attr[i].i == 0)
+ {
+ BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
+ out_attr[i].i = in_attr[i].i;
+ out_attr[Tag_ABI_HardFP_use].i
+ = in_attr[Tag_ABI_HardFP_use].i;
+ break;
+ }
+ /* If the input has no requirement about FP hardware, do
+ nothing. */
+ else if (in_attr[i].i == 0)
+ {
+ BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
+ break;
+ }
+
+ /* Both the input and the output have nonzero Tag_FP_arch.
+ So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
+
+ /* If both the input and the output have zero Tag_ABI_HardFP_use,
+ do nothing. */
+ if (in_attr[Tag_ABI_HardFP_use].i == 0
+ && out_attr[Tag_ABI_HardFP_use].i == 0)
+ ;
+ /* If the input and the output have different Tag_ABI_HardFP_use,
+ the combination of them is 3 (SP & DP). */
+ else if (in_attr[Tag_ABI_HardFP_use].i
+ != out_attr[Tag_ABI_HardFP_use].i)
+ out_attr[Tag_ABI_HardFP_use].i = 3;
+
+ /* Now we can handle Tag_FP_arch. */
+
/* Values greater than 6 aren't defined, so just pick the
biggest */
if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i)
/* Merged in target-independent code. */
break;
case Tag_ABI_HardFP_use:
- /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
- if ((in_attr[i].i == 1 && out_attr[i].i == 2)
- || (in_attr[i].i == 2 && out_attr[i].i == 1))
- out_attr[i].i = 3;
- else if (in_attr[i].i > out_attr[i].i)
- out_attr[i].i = in_attr[i].i;
+ /* This is handled along with Tag_FP_arch. */
break;
case Tag_ABI_FP_16bit_format:
if (in_attr[i].i != 0 && out_attr[i].i != 0)
+2010-05-11 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/tc-arm.c (aeabi_set_public_attributes): Set Tag_DIV_use.
+
+2010-05-11 Jie Zhang <jie@codesourcery.com>
+
+ * config/tc-arm.c (aeabi_set_public_attributes): Set
+ Tag_ABI_HardFP_use to 1 if a single precision FPU is selected.
+
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
|| ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_v1xd))
aeabi_set_attribute_int (Tag_VFP_arch, 1);
+ /* Tag_ABI_HardFP_use. */
+ if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_v1xd)
+ && !ARM_CPU_HAS_FEATURE (flags, fpu_vfp_ext_v1))
+ aeabi_set_attribute_int (Tag_ABI_HardFP_use, 1);
+
/* Tag_WMMX_arch. */
if (ARM_CPU_HAS_FEATURE (flags, arm_cext_iwmmxt2))
aeabi_set_attribute_int (Tag_WMMX_arch, 2);
/* Tag_VFP_HP_extension (formerly Tag_NEON_FP16_arch). */
if (ARM_CPU_HAS_FEATURE (flags, fpu_vfp_fp16))
aeabi_set_attribute_int (Tag_VFP_HP_extension, 1);
+
+ /* Tag_DIV_use. */
+ if (ARM_CPU_HAS_FEATURE (flags, arm_ext_div))
+ aeabi_set_attribute_int (Tag_DIV_use, 0);
+ /* Fill this in when gas supports v7a sdiv/udiv.
+ else if (... v7a with div extension used ...)
+ aeabi_set_attribute_int (Tag_DIV_use, 2); */
+ else
+ aeabi_set_attribute_int (Tag_DIV_use, 1);
}
/* Add the default contents for the .ARM.attributes section. */
+2010-05-11 Andrew Stubbs <ams@codesourcery.com>
+
+ * gas/arm/attr-cpu-directive.d: Add Tag_DIV_use.
+ * gas/arm/attr-default.d: Likewise.
+ * gas/arm/attr-march-armv1.d: Likewise.
+ * gas/arm/attr-march-armv2.d: Likewise.
+ * gas/arm/attr-march-armv2a.d: Likewise.
+ * gas/arm/attr-march-armv2s.d: Likewise.
+ * gas/arm/attr-march-armv3.d: Likewise.
+ * gas/arm/attr-march-armv3m.d: Likewise.
+ * gas/arm/attr-march-armv4.d: Likewise.
+ * gas/arm/attr-march-armv4t.d: Likewise.
+ * gas/arm/attr-march-armv4txm.d: Likewise.
+ * gas/arm/attr-march-armv4xm.d: Likewise.
+ * gas/arm/attr-march-armv5.d: Likewise.
+ * gas/arm/attr-march-armv5t.d: Likewise.
+ * gas/arm/attr-march-armv5te.d: Likewise.
+ * gas/arm/attr-march-armv5tej.d: Likewise.
+ * gas/arm/attr-march-armv5texp.d: Likewise.
+ * gas/arm/attr-march-armv5txm.d: Likewise.
+ * gas/arm/attr-march-armv6-m.d: Likewise.
+ * gas/arm/attr-march-armv6.d: Likewise.
+ * gas/arm/attr-march-armv6j.d: Likewise.
+ * gas/arm/attr-march-armv6k.d: Likewise.
+ * gas/arm/attr-march-armv6kt2.d: Likewise.
+ * gas/arm/attr-march-armv6t2.d: Likewise.
+ * gas/arm/attr-march-armv6z.d: Likewise.
+ * gas/arm/attr-march-armv6zk.d: Likewise.
+ * gas/arm/attr-march-armv6zkt2.d: Likewise.
+ * gas/arm/attr-march-armv6zt2.d: Likewise.
+ * gas/arm/attr-march-armv7-a.d: Likewise.
+ * gas/arm/attr-march-armv7.d: Likewise.
+ * gas/arm/attr-march-armv7a.d: Likewise.
+ * gas/arm/attr-march-iwmmxt.d: Likewise.
+ * gas/arm/attr-march-iwmmxt2.d: Likewise.
+ * gas/arm/attr-march-marvell-f.d: Likewise.
+ * gas/arm/attr-march-xscale.d: Likewise.
+ * gas/arm/attr-mcpu.d: Likewise.
+ * gas/arm/attr-mfpu-arm1020e.d: Likewise.
+ * gas/arm/attr-mfpu-arm1020t.d: Likewise.
+ * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
+ * gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
+ * gas/arm/attr-mfpu-arm7500fe.d: Likewise.
+ * gas/arm/attr-mfpu-fpa.d: Likewise.
+ * gas/arm/attr-mfpu-fpa10.d: Likewise.
+ * gas/arm/attr-mfpu-fpa11.d: Likewise.
+ * gas/arm/attr-mfpu-fpe.d: Likewise.
+ * gas/arm/attr-mfpu-fpe2.d: Likewise.
+ * gas/arm/attr-mfpu-fpe3.d: Likewise.
+ * gas/arm/attr-mfpu-maverick.d: Likewise.
+ * gas/arm/attr-mfpu-neon-fp16.d: Likewise.
+ * gas/arm/attr-mfpu-neon.d: Likewise.
+ * gas/arm/attr-mfpu-softfpa.d: Likewise.
+ * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
+ * gas/arm/attr-mfpu-softvfp.d: Likewise.
+ * gas/arm/attr-mfpu-vfp.d: Likewise.
+ * gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
+ * gas/arm/attr-mfpu-vfp10.d: Likewise.
+ * gas/arm/attr-mfpu-vfp3.d: Likewise.
+ * gas/arm/attr-mfpu-vfp9.d: Likewise.
+ * gas/arm/attr-mfpu-vfpv2.d: Likewise.
+ * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
+ * gas/arm/attr-mfpu-vfpv3.d: Likewise.
+ * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
+ * gas/arm/attr-mfpu-vfpv4.d: Likewise.
+ * gas/arm/attr-mfpu-vfpxd.d: Likewise.
+ * gas/arm/attr-order.d: Likewise.
+ * gas/arm/attr-override-cpu-directive.d: Likewise.
+ * gas/arm/attr-override-mcpu.d: Likewise.
+ * gas/arm/eabi_attr_1.d: Likewise.
+
+2010-05-11 Jie Zhang <jie@codesourcery.com>
+
+ * gas/arm/attr-mfpu-vfpxd.d: New test.
+
+2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * gas/arm/thumb32.d: Fix expected disassembly of ldmia
+ instruction.
+
2010-05-05 Nathan Sidwell <nathan@codesourcery.com>
* gas/all/byte.s: New.
Tag_CPU_arch_profile: Application
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_name: "1"
Tag_CPU_arch: v4
Tag_ARM_ISA_use: Yes
+ Tag_DIV_use: Not allowed
Tag_CPU_name: "2"
Tag_CPU_arch: v4
Tag_ARM_ISA_use: Yes
+ Tag_DIV_use: Not allowed
Tag_CPU_name: "2A"
Tag_CPU_arch: v4
Tag_ARM_ISA_use: Yes
+ Tag_DIV_use: Not allowed
Tag_CPU_name: "2S"
Tag_CPU_arch: v4
Tag_ARM_ISA_use: Yes
+ Tag_DIV_use: Not allowed
Tag_CPU_name: "3"
Tag_CPU_arch: v4
Tag_ARM_ISA_use: Yes
+ Tag_DIV_use: Not allowed
Tag_CPU_name: "3M"
Tag_CPU_arch: v4
Tag_ARM_ISA_use: Yes
+ Tag_DIV_use: Not allowed
Tag_CPU_name: "4"
Tag_CPU_arch: v4
Tag_ARM_ISA_use: Yes
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v4T
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v4T
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_name: "4XM"
Tag_CPU_arch: v4
Tag_ARM_ISA_use: Yes
+ Tag_DIV_use: Not allowed
Tag_CPU_name: "5"
Tag_CPU_arch: v5T
Tag_ARM_ISA_use: Yes
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v5T
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v5TE
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v5TEJ
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v5TE
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v5T
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6-M
Tag_CPU_arch_profile: Microcontroller
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6K
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6T2
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6T2
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6KZ
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6K
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6T2
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6T2
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
+ Tag_DIV_use: Not allowed
Tag_CPU_arch_profile: Application
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
+ Tag_DIV_use: Not allowed
Tag_CPU_name: "7"
Tag_CPU_arch: v7
Tag_THUMB_ISA_use: Thumb-2
+ Tag_DIV_use: Not allowed
Tag_CPU_arch_profile: Application
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_WMMX_arch: WMMXv1
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_WMMX_arch: WMMXv2
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v5TE
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-2
Tag_FP_arch: VFPv3
Tag_Advanced_SIMD_arch: NEONv1
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv2
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv1
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv2
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv2
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_FP_arch: VFPv3
Tag_Advanced_SIMD_arch: NEONv1
Tag_FP_HP_extension: Allowed
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv3
Tag_Advanced_SIMD_arch: NEONv1
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv2
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv2
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv1
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv2
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv3
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv2
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv2
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv3-D16
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv3
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv4-D16
Tag_FP_HP_extension: Allowed
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv4
Tag_FP_HP_extension: Allowed
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv1
+ Tag_ABI_HardFP_use: SP only
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v4T
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_unknown_63: "val"
Tag_also_compatible_with: v6-M
Tag_T2EE_use: Allowed
Tag_CPU_name: "custom name"
Tag_CPU_arch: v7
Tag_THUMB_ISA_use: \?\?\? \(10\)
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v4T
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-1
Tag_ABI_VFP_args: VFP registers
Tag_compatibility: flag = 3, vendor = GNU
+ Tag_DIV_use: Not allowed
Tag_unknown_128: 1234 \(0x4d2\)
Tag_unknown_129: "bar"
0[0-9a-f]+ <[^>]+> e854 1f81 ldrex r1, \[r4, #516\].*
0[0-9a-f]+ <[^>]+> e844 2181 strex r1, r2, \[r4, #516\].*
0[0-9a-f]+ <[^>]+> c80e ldmia r0!, \{r1, r2, r3\}
-0[0-9a-f]+ <[^>]+> ca07 ldmia r2!, \{r0, r1, r2\}
+0[0-9a-f]+ <[^>]+> ca07 ldmia r2, \{r0, r1, r2\}
0[0-9a-f]+ <[^>]+> e892 0007 ldmia\.w r2, \{r0, r1, r2\}
0[0-9a-f]+ <[^>]+> e899 0007 ldmia\.w r9, \{r0, r1, r2\}
0[0-9a-f]+ <[^>]+> e890 0580 ldmia\.w r0, \{r7, r8, sl\}
+2010-05-11 Andrew Stubbs <ams@codesourcery.com>
+
+ * ld-arm/attr-merge-2.attr: Add Tag_DIV_use.
+ * ld-arm/attr-merge-2a.s: Likewise.
+ * ld-arm/attr-merge-2b.s: Likewise.
+ * ld-arm/attr-merge-3a.s: Likewise.
+ * ld-arm/attr-merge-3b.s: Likewise.
+ * ld-arm/attr-merge-4.attr: Likewise.
+ * ld-arm/attr-merge-5.attr: Likewise.
+ * ld-arm/attr-merge-6.attr: Likewise.
+ * ld-arm/attr-merge-7.attr: Likewise.
+ * ld-arm/attr-merge-arch-1.attr: Likewise.
+ * ld-arm/attr-merge-arch-2.attr: Likewise.
+ * ld-arm/attr-merge-unknown-2.d: Likewise.
+ * ld-arm/attr-merge-unknown-2r.d: Likewise.
+ * ld-arm/attr-merge-unknown-3.d: Likewise.
+ * ld-arm/attr-merge-vfp-1.d: Likewise.
+ * ld-arm/attr-merge-vfp-1r.d: Likewise.
+ * ld-arm/attr-merge-vfp-2.d: Likewise.
+ * ld-arm/attr-merge-vfp-2r.d: Likewise.
+ * ld-arm/attr-merge-vfp-3.d: Likewise.
+ * ld-arm/attr-merge-vfp-3r.d: Likewise.
+ * ld-arm/attr-merge-vfp-4.d: Likewise.
+ * ld-arm/attr-merge-vfp-4r.d: Likewise.
+ * ld-arm/attr-merge-vfp-5.d: Likewise.
+ * ld-arm/attr-merge-vfp-5r.d: Likewise.
+ * ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
+ * ld-arm/attr-merge-wchar-00.d: Likewise.
+ * ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
+ * ld-arm/attr-merge-wchar-02.d: Likewise.
+ * ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
+ * ld-arm/attr-merge-wchar-04.d: Likewise.
+ * ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
+ * ld-arm/attr-merge-wchar-20.d: Likewise.
+ * ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
+ * ld-arm/attr-merge-wchar-22.d: Likewise.
+ * ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
+ * ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
+ * ld-arm/attr-merge-wchar-40.d: Likewise.
+ * ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
+ * ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
+ * ld-arm/attr-merge-wchar-44.d: Likewise.
+ * ld-arm/attr-merge.attr: Likewise.
+
+2010-05-11 Jie Zhang <jie@codesourcery.com>
+
+ * ld-arm/attr-merge-vfp-6.d: New test.
+ * ld-arm/attr-merge-vfp-6r.d: New test.
+ * ld-arm/attr-merge-vfpv3xd.s: New test.
+ * ld-arm/arm-elf.exp: Add attr-merge-vfp-6 and attr-merge-vfp-6r.
+
2010-05-07 Daniel Jacobowitz <dan@codesourcery.com>
* ld-arm/cortex-a8-fix-bl-rel-plt.d: New file.
run_dump_test "attr-merge-vfp-4r"
run_dump_test "attr-merge-vfp-5"
run_dump_test "attr-merge-vfp-5r"
+run_dump_test "attr-merge-vfp-6"
+run_dump_test "attr-merge-vfp-6r"
run_dump_test "attr-merge-incompatible"
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Allowed in v7-A with integer division extension
.eabi_attribute 25, 1
.eabi_attribute 26, 1
.eabi_attribute 30, 6
+ .eabi_attribute Tag_DIV_use, 1
.file "attr-merge-2a.s"
.eabi_attribute 26, 1
.eabi_attribute 30, 6
.eabi_attribute 18, 4
+ .eabi_attribute Tag_DIV_use, 2
.file "attr-merge-2b.s"
.eabi_attribute Tag_conformance, "0"
.eabi_attribute Tag_Virtualization_use, 0
.eabi_attribute Tag_MPextension_use, 0
+ .eabi_attribute Tag_DIV_use, 0
.eabi_attribute Tag_conformance, "2.08"
.eabi_attribute Tag_Virtualization_use, 1
.eabi_attribute Tag_MPextension_use, 1
+ .eabi_attribute Tag_DIV_use, 1
Tag_CPU_arch_profile: Microcontroller
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_also_compatible_with: v6-M
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_compatibility: flag = 1, vendor = gnu
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
Tag_MPextension_use: Allowed
-
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
Tag_MPextension_use: Allowed
-
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v7
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-2
+ Tag_DIV_use: Not allowed
Tag_CPU_arch: v6K
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
-
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
-
+ Tag_DIV_use: Not allowed
File Attributes
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
+ Tag_DIV_use: Not allowed
Tag_unknown_82: 1 \(0x1\)
-
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv3-D16
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv3-D16
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv3
+ Tag_DIV_use: Not allowed
Tag_ARM_ISA_use: Yes
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv3
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv4-D16
Tag_FP_HP_extension: Allowed
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv4-D16
Tag_FP_HP_extension: Allowed
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv4
Tag_FP_HP_extension: Allowed
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv4
Tag_FP_HP_extension: Allowed
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv4
Tag_FP_HP_extension: Allowed
+ Tag_DIV_use: Not allowed
Tag_THUMB_ISA_use: Thumb-1
Tag_FP_arch: VFPv4
Tag_FP_HP_extension: Allowed
+ Tag_DIV_use: Not allowed
--- /dev/null
+#source: attr-merge-vfp-3.s
+#source: attr-merge-vfpv3xd.s
+#as:
+#ld: -r
+#readelf: -A
+# This test is only valid on ELF based ports.
+# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+
+Attribute Section: aeabi
+File Attributes
+ Tag_ARM_ISA_use: Yes
+ Tag_THUMB_ISA_use: Thumb-1
+ Tag_FP_arch: VFPv3
+ Tag_ABI_HardFP_use: SP and DP
+ Tag_DIV_use: Not allowed
--- /dev/null
+#source: attr-merge-vfpv3xd.s
+#source: attr-merge-vfp-3.s
+#as:
+#ld: -r
+#readelf: -A
+# This test is only valid on ELF based ports.
+# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+
+Attribute Section: aeabi
+File Attributes
+ Tag_ARM_ISA_use: Yes
+ Tag_THUMB_ISA_use: Thumb-1
+ Tag_FP_arch: VFPv3
+ Tag_ABI_HardFP_use: SP and DP
+ Tag_DIV_use: Not allowed
--- /dev/null
+.fpu vfpv3xd
+
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
Tag_ABI_align_preserved: 8-byte, except leaf SP
Tag_ABI_enum_size: small
Tag_ABI_optimization_goals: Aggressive Debug
+ Tag_DIV_use: Not allowed
+2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
+ format.
+ (print_insn_thumb16): Add support for new %W format.
+
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
%x print warning if conditional an not at end of IT block"
%X print "\t; unpredictable <IT:code>" if conditional
%I print IT instruction suffix and operands
+ %W print Thumb Writeback indicator for LDMIA
%<bitfield>r print bitfield as an ARM register
%<bitfield>d print bitfield as a decimal
%<bitfield>H print (bitfield * 2) as a decimal
{ARM_EXT_V4T, 0xA800, 0xF800, "add%c\t%8-10r, sp, #%0-7W"},
/* format 15 */
{ARM_EXT_V4T, 0xC000, 0xF800, "stmia%c\t%8-10r!, %M"},
- {ARM_EXT_V4T, 0xC800, 0xF800, "ldmia%c\t%8-10r!, %M"},
+ {ARM_EXT_V4T, 0xC800, 0xF800, "ldmia%c\t%8-10r%W, %M"},
/* format 17 */
{ARM_EXT_V4T, 0xDF00, 0xFF00, "svc%c\t%0-7d"},
/* format 16 */
}
break;
+ case 'W':
+ /* Print writeback indicator for a LDMIA. We are doing a
+ writeback if the base register is not in the register
+ mask. */
+ if ((given & (1 << ((given & 0x0700) >> 8))) == 0)
+ func (stream, "!");
+ break;
+
case 'b':
/* Print ARM V6T2 CZB address: pc+4+6 bits. */
{
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