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drm/amd/display: Only apply ctx for specific surface.
authorYongqiang Sun <yongqiang.sun@amd.com>
Wed, 3 May 2017 14:25:51 +0000 (10:25 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 22:06:56 +0000 (18:06 -0400)
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

index fb4eb43..ece8c96 100644 (file)
@@ -1689,19 +1689,21 @@ static void dcn10_apply_ctx_for_surface(
 {
        int i;
 
-       memcpy(context->res_ctx.mpc_tree,
-                       dc->current_context->res_ctx.mpc_tree,
-                       sizeof(struct mpc_tree_cfg) * dc->res_pool->pipe_count);
-
        for (i = 0; i < dc->res_pool->pipe_count; i++) {
                struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
 
-               if (!pipe_ctx->surface)
+               if (!pipe_ctx->surface || pipe_ctx->surface != surface)
                        continue;
 
+
                /* looking for top pipe to program */
-               if (!pipe_ctx->top_pipe)
+               if (!pipe_ctx->top_pipe) {
+                       memcpy(context->res_ctx.mpc_tree,
+                                       dc->current_context->res_ctx.mpc_tree,
+                                       sizeof(struct mpc_tree_cfg) * dc->res_pool->pipe_count);
+
                        program_all_pipe_in_tree(dc, pipe_ctx, context);
+               }
        }
 
        for (i = 0; i < dc->res_pool->pipe_count; i++) {