Add HEVC ROI attributes for VAConfigAttribEncROI

Fixes #179

Signed-off-by: peng.chen <peng.c.chen@intel.com>

diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c
index fd38045..93f7d13 100644 (file)
--- a/src/i965_drv_video.c
+++ b/src/i965_drv_video.c
@@ -1084,6 +1084,8 @@ i965_GetConfigAttributes(VADriverContextP ctx,
         case VAConfigAttribEncROI:
             if (entrypoint == VAEntrypointEncSlice ||
                 entrypoint == VAEntrypointEncSliceLP) {
+                VAConfigAttribValEncROI *roi_config =
+                    (VAConfigAttribValEncROI *) & (attrib_list[i].value);
 
                 if (profile == VAProfileH264ConstrainedBaseline ||
                     profile == VAProfileH264Main ||
@@ -1093,10 +1095,6 @@ i965_GetConfigAttributes(VADriverContextP ctx,
                         entrypoint == VAEntrypointEncSlice)
                         attrib_list[i].value = 0;
                     else {
-
-                        VAConfigAttribValEncROI *roi_config =
-                            (VAConfigAttribValEncROI *) & (attrib_list[i].value);
-
                         if (entrypoint == VAEntrypointEncSliceLP) {
                             roi_config->bits.num_roi_regions = 3;
                             roi_config->bits.roi_rc_priority_support = 0;
@@ -1108,6 +1106,12 @@ i965_GetConfigAttributes(VADriverContextP ctx,
                             roi_config->bits.roi_rc_qp_delat_support = 1;
                         }
                     }
+                } else if (profile == VAProfileHEVCMain ||
+                           profile == VAProfileHEVCMain10) {
+                    roi_config->bits.num_roi_regions =
+                        I965_MAX_NUM_ROI_REGIONS;
+                    roi_config->bits.roi_rc_priority_support = 1;
+                    roi_config->bits.roi_rc_qp_delat_support = 1;
                 } else {
                     attrib_list[i].value = 0;
                 }