drm/amd/amdgpu: Fix style problems in amdgpu_debugfs.c

Fix the following issues reported by checkpatch:

WARNING: please, no space before tabs
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
WARNING: sizeof *rd should be sizeof(*rd)
WARNING: Missing a blank line after declarations
WARNING: sizeof rd->id should be sizeof(rd->id)
WARNING: static const char * array should probably be static const char * const
WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
WARNING: Prefer seq_puts to seq_printf
ERROR: space prohibited after that open parenthesis '('

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
index cc64ae5..df94cd2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
@@ -56,14 +56,14 @@
  *
  * Bit 62:  Indicates a GRBM bank switch is needed
  * Bit 61:  Indicates a SRBM bank switch is needed (implies bit 62 is
- *         zero)
+ *         zero)
  * Bits 24..33: The SE or ME selector if needed
  * Bits 34..43: The SH (or SA) or PIPE selector if needed
  * Bits 44..53: The INSTANCE (or CU/WGP) or QUEUE selector if needed
  *
  * Bit 23:  Indicates that the PM power gating lock should be held
- *         This is necessary to read registers that might be
- *         unreliable during a power gating transistion.
+ *         This is necessary to read registers that might be
+ *         unreliable during a power gating transistion.
  *
  * The lower bits are the BYTE offset of the register to read.  This
  * allows reading multiple registers in a single call and having
@@ -76,7 +76,7 @@ static int  amdgpu_debugfs_process_reg_op(bool read, struct file *f,
        ssize_t result = 0;
        int r;
        bool pm_pg_lock, use_bank, use_ring;
-       unsigned instance_bank, sh_bank, se_bank, me, pipe, queue, vmid;
+       unsigned int instance_bank, sh_bank, se_bank, me, pipe, queue, vmid;
 
        pm_pg_lock = use_bank = use_ring = false;
        instance_bank = sh_bank = se_bank = me = pipe = queue = vmid = 0;
@@ -208,7 +208,7 @@ static int amdgpu_debugfs_regs2_open(struct inode *inode, struct file *file)
 {
        struct amdgpu_debugfs_regs2_data *rd;
 
-       rd = kzalloc(sizeof *rd, GFP_KERNEL);
+       rd = kzalloc(sizeof(*rd), GFP_KERNEL);
        if (!rd)
                return -ENOMEM;
        rd->adev = file_inode(file)->i_private;
@@ -221,6 +221,7 @@ static int amdgpu_debugfs_regs2_open(struct inode *inode, struct file *file)
 static int amdgpu_debugfs_regs2_release(struct inode *inode, struct file *file)
 {
        struct amdgpu_debugfs_regs2_data *rd = file->private_data;
+
        mutex_destroy(&rd->lock);
        kfree(file->private_data);
        return 0;
@@ -324,7 +325,8 @@ static long amdgpu_debugfs_regs2_ioctl(struct file *f, unsigned int cmd, unsigne
        switch (cmd) {
        case AMDGPU_DEBUGFS_REGS2_IOC_SET_STATE:
                mutex_lock(&rd->lock);
-               r = copy_from_user(&rd->id, (struct amdgpu_debugfs_regs2_iocdata *)data, sizeof rd->id);
+               r = copy_from_user(&rd->id, (struct amdgpu_debugfs_regs2_iocdata *)data,
+                                  sizeof(rd->id));
                mutex_unlock(&rd->lock);
                return r ? -EINVAL : 0;
        default:
@@ -863,7 +865,7 @@ static ssize_t amdgpu_debugfs_sensor_read(struct file *f, char __user *buf,
  * The offset being sought changes which wave that the status data
  * will be returned for.  The bits are used as follows:
  *
- * Bits 0..6:  Byte offset into data
+ * Bits 0..6:  Byte offset into data
  * Bits 7..14: SE selector
  * Bits 15..22:        SH/SA selector
  * Bits 23..30: CU/{WGP+SIMD} selector
@@ -1429,7 +1431,7 @@ static const struct file_operations *debugfs_regs[] = {
        &amdgpu_debugfs_gfxoff_residency_fops,
 };
 
-static const char *debugfs_regs_names[] = {
+static const char * const debugfs_regs_names[] = {
        "amdgpu_regs",
        "amdgpu_regs2",
        "amdgpu_regs_didt",
@@ -1447,7 +1449,7 @@ static const char *debugfs_regs_names[] = {
 
 /**
  * amdgpu_debugfs_regs_init -  Initialize debugfs entries that provide
- *                             register access.
+ *                             register access.
  *
  * @adev: The device to attach the debugfs entries to
  */
@@ -1459,7 +1461,7 @@ int amdgpu_debugfs_regs_init(struct amdgpu_device *adev)
 
        for (i = 0; i < ARRAY_SIZE(debugfs_regs); i++) {
                ent = debugfs_create_file(debugfs_regs_names[i],
-                                         S_IFREG | S_IRUGO, root,
+                                         S_IFREG | 0444, root,
                                          adev, debugfs_regs[i]);
                if (!i && !IS_ERR_OR_NULL(ent))
                        i_size_write(ent->d_inode, adev->rmmio_size);
@@ -1494,12 +1496,12 @@ static int amdgpu_debugfs_test_ib_show(struct seq_file *m, void *unused)
                kthread_park(ring->sched.thread);
        }
 
-       seq_printf(m, "run ib test:\n");
+       seq_puts(m, "run ib test:\n");
        r = amdgpu_ib_ring_tests(adev);
        if (r)
                seq_printf(m, "ib ring tests failed (%d).\n", r);
        else
-               seq_printf(m, "ib ring tests passed.\n");
+               seq_puts(m, "ib ring tests passed.\n");
 
        /* go on the scheduler */
        for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
@@ -1978,7 +1980,7 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
                amdgpu_debugfs_ring_init(adev, ring);
        }
 
-       for ( i = 0; i < adev->vcn.num_vcn_inst; i++) {
+       for (i = 0; i < adev->vcn.num_vcn_inst; i++) {
                if (!amdgpu_vcnfw_log)
                        break;