{
TCGv_i32 tmp1, tmp2;
- tmp1 = tcg_const_i32(exception);
- tmp2 = tcg_const_i32(error_code);
+ tmp1 = tcg_constant_i32(exception);
+ tmp2 = tcg_constant_i32(error_code);
gen_helper_excp(cpu_env, tmp1, tmp2);
- tcg_temp_free_i32(tmp2);
- tcg_temp_free_i32(tmp1);
}
static DisasJumpType gen_excp(DisasContext *ctx, int exception, int error_code)
return DISAS_NORETURN;
} else {
- TCGv_i64 z = tcg_const_i64(0);
- TCGv_i64 d = tcg_const_i64(dest);
- TCGv_i64 p = tcg_const_i64(ctx->base.pc_next);
+ TCGv_i64 z = load_zero(ctx);
+ TCGv_i64 d = tcg_constant_i64(dest);
+ TCGv_i64 p = tcg_constant_i64(ctx->base.pc_next);
tcg_gen_movcond_i64(cond, cpu_pc, cmp, z, d, p);
-
- tcg_temp_free_i64(z);
- tcg_temp_free_i64(d);
- tcg_temp_free_i64(p);
return DISAS_PC_UPDATED;
}
}
if (!(fn11 & QUAL_I)) {
ignore |= FPCR_INE;
}
- ign = tcg_const_i32(ignore);
+ ign = tcg_constant_i32(ignore);
/* ??? Pass in the regno of the destination so that the helper can
set EXC_MASK, which contains a bitmask of destination registers
that have caused arithmetic traps. A simple userspace emulation
does not require this. We do need it for a guest kernel's entArith,
or if we were to do something clever with imprecise exceptions. */
- reg = tcg_const_i32(rc + 32);
+ reg = tcg_constant_i32(rc + 32);
if (fn11 & QUAL_S) {
gen_helper_fp_exc_raise_s(cpu_env, ign, reg);
} else {
gen_helper_fp_exc_raise(cpu_env, ign, reg);
}
-
- tcg_temp_free_i32(reg);
- tcg_temp_free_i32(ign);
}
static void gen_cvtlq(TCGv vc, TCGv vb)
static void gen_cpy_mask(TCGv vc, TCGv va, TCGv vb, bool inv_a, uint64_t mask)
{
- TCGv vmask = tcg_const_i64(mask);
+ TCGv vmask = tcg_constant_i64(mask);
TCGv tmp = tcg_temp_new_i64();
if (inv_a) {
tcg_gen_andc_i64(vc, vb, vmask);
tcg_gen_or_i64(vc, vc, tmp);
- tcg_temp_free(vmask);
tcg_temp_free(tmp);
}
case 0x3E:
/* WTINT */
- {
- TCGv_i32 tmp = tcg_const_i32(1);
- tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) +
- offsetof(CPUState, halted));
- tcg_temp_free_i32(tmp);
- }
+ tcg_gen_st_i32(tcg_constant_i32(1), cpu_env,
+ -offsetof(AlphaCPU, env) +
+ offsetof(CPUState, halted));
tcg_gen_movi_i64(ctx->ir[IR_V0], 0);
return gen_excp(ctx, EXCP_HALTED, 0);
case 253:
/* WAIT */
- {
- TCGv_i32 tmp = tcg_const_i32(1);
- tcg_gen_st_i32(tmp, cpu_env, -offsetof(AlphaCPU, env) +
- offsetof(CPUState, halted));
- tcg_temp_free_i32(tmp);
- }
+ tcg_gen_st_i32(tcg_constant_i32(1), cpu_env,
+ -offsetof(AlphaCPU, env) + offsetof(CPUState, halted));
return gen_excp(ctx, EXCP_HALTED, 0);
case 252:
vb = load_gpr(ctx, rb);
}
tcg_gen_movi_i64(cpu_lock_addr, -1);
+ st_flag_byte(load_zero(ctx), ENV_FLAG_RX_SHIFT);
tmp = tcg_temp_new();
- tcg_gen_movi_i64(tmp, 0);
- st_flag_byte(tmp, ENV_FLAG_RX_SHIFT);
tcg_gen_andi_i64(tmp, vb, 1);
st_flag_byte(tmp, ENV_FLAG_PAL_SHIFT);
tcg_temp_free(tmp);