OSDN Git Service

drm/i915/adl_s: Update memory bandwidth parameters
authorTejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Fri, 29 Jan 2021 18:29:43 +0000 (10:29 -0800)
committerJosé Roberto de Souza <jose.souza@intel.com>
Mon, 1 Feb 2021 15:57:17 +0000 (07:57 -0800)
Just like RKL, the ADL_S platform also has different memory
characteristics from past platforms.  Update the values used
by our memory bandwidth calculations accordingly.

v2: Fix minor nitpick for shifting ADLS case above RKL(based on platform
order).(mdroper)

Bspec: 64631
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210129182945.217078-7-aditya.swarup@intel.com
drivers/gpu/drm/i915/display/intel_bw.c

index bd06040..d7575aa 100644 (file)
@@ -205,6 +205,12 @@ static const struct intel_sa_info rkl_sa_info = {
        .displayrtids = 128,
 };
 
+static const struct intel_sa_info adls_sa_info = {
+       .deburst = 16,
+       .deprogbwlimit = 38, /* GB/s */
+       .displayrtids = 256,
+};
+
 static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel_sa_info *sa)
 {
        struct intel_qgv_info qi = {};
@@ -315,7 +321,9 @@ void intel_bw_init_hw(struct drm_i915_private *dev_priv)
        if (!HAS_DISPLAY(dev_priv))
                return;
 
-       if (IS_ROCKETLAKE(dev_priv))
+       if (IS_ALDERLAKE_S(dev_priv))
+               icl_get_bw_info(dev_priv, &adls_sa_info);
+       else if (IS_ROCKETLAKE(dev_priv))
                icl_get_bw_info(dev_priv, &rkl_sa_info);
        else if (IS_GEN(dev_priv, 12))
                icl_get_bw_info(dev_priv, &tgl_sa_info);