--- /dev/null
+/*
+ * Copyright 2000-2011 Intel Corporation All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+// 57 // Total instruction count
+// 1 // Total kernel count
+
+.kernel NV12_DI_NV12
+.code
+
+
+
+// FileName: DI.asm
+// Author: Vivek Kumar
+// Description: Tasks for DI only case (16x4 block)
+
+
+
+
+// Module name: common.inc
+//
+// Common header file for all Video-Processing kernels
+//
+
+.default_execution_size (16)
+.default_register_type :ub
+
+.reg_count_total 128
+.reg_count_payload 7
+
+//========== Common constants ==========
+
+
+//========== Macros ==========
+
+
+//Fast Jump, For more details see "Set_Layer_N.asm"
+
+
+//========== Defines ====================
+
+//========== Static Parameters (Common To All) ==========
+//r1
+
+
+//r2
+
+ // e.g. byte0 byte1 byte2
+ // YUYV 0 1 3
+ // YVYU 0 3 1
+
+//Color Pipe (IECP) parameters
+
+
+//ByteCopy
+
+
+//r4
+
+ // e.g. byte0 byte1 byte2
+ // YUYV 0 1 3
+ // YVYU 0 3 1
+
+
+//========== Inline parameters (Common To All) ===========
+
+
+//============== Binding Index Table===========
+//Common between DNDI and DNUV
+
+
+//================= Common Message Descriptor =====
+// Message descriptor for thread spawning
+// Message Descriptors
+// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later)
+// 0000,0000,0000
+// 0001(Spawn a root thread),0001 (Root thread spawn thread)
+// = 0x02000011
+// Thread Spawner Message Descriptor
+
+
+// Message descriptor for atomic operation add
+// Message Descriptors
+// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later)
+// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add)
+// 0000,0000 (Binding table index, added later)
+// = 0x02000011
+
+// Atomic Operation Add Message Descriptor
+
+
+// Message descriptor for dataport media write
+ // Message Descriptors
+ // = 000 0001 (min message len 1 - add later) 00000 (resp len 0)
+ // 1 (header present 1) 0 1010 (media block write) 000000
+ // 00000000 (binding table index - set later)
+ // = 0x020A8000
+
+
+// Message Length defines
+
+
+// Response Length defines
+
+
+// Block Width and Height Size defines
+
+
+// Extended Message Descriptors
+
+
+// Common message descriptors:
+
+
+//===================== Math Function Control ===================================
+
+
+//============ Message Registers ===============
+ // buf4 starts from r28
+
+
+//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT
+
+
+.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub
+.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw
+.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud
+.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f
+
+//=================== End of thread instruction ===========================
+
+
+//=====================Pointers Used=====================================
+
+
+//=======================================================================
+
+
+//r9-r17
+// Define temp space for any usages
+
+
+// Common Buffers
+
+
+// temp space for rotation
+
+.declare fROBUF Base=r9.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f
+
+.declare udROBUF Base=r9.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
+
+.declare uwROBUF Base=r9.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
+
+.declare ubROBUF Base=r9.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
+
+.declare ub4ROBUF Base=r9.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub
+
+
+// End of common.inc
+
+
+// FileName: DNDI.inc
+// Author: Vivek Kumar
+// Description: Include file for DN, DI and DNDI
+// Inputs: DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED
+
+
+
+
+// End of common.inc
+
+
+//Interface:
+//Static Parameters:
+//r1
+
+
+//====================== Binding table (Explicit To DNDI)=========================================
+
+
+.declare mudMSGHDR_DNDI Base=r18 ElementSize=4 Type=ud
+.declare mdMSGHDR_DNDI Base=r18 ElementSize=4 Type=d
+.declare mwMSGHDR_DNDI Base=r18 ElementSize=2 Type=w
+
+
+.declare mudMSGHDR_STMM Base=r20 ElementSize=4 Type=ud
+
+
+.declare mudMSGHDR_HIST Base=r22 ElementSize=4 Type=ud
+
+
+.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4 Type=ud
+.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2 Type=uw
+.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1 Type=ub
+
+
+.declare mudMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=ud
+.declare mdMSGHDR_DN_OUT Base=r31.0 ElementSize=4 Type=d
+.declare mubMSGHDR_DN_OUT Base=r31.0 ElementSize=1 Type=ub
+
+
+.declare mudMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=ud
+.declare mdMSGHDR_UVCOPY Base=r36 ElementSize=4 Type=d
+.declare mudMSGHDR_UCOPY Base=r36 ElementSize=4 Type=ud
+.declare mudMSGHDR_VCOPY Base=r38 ElementSize=4 Type=ud
+
+
+.declare mudMSGHDR_DI_OUT1 Base=r18.0 ElementSize=4 Type=ud
+.declare mubMSGHDR_DI_OUT1 Base=r18.0 ElementSize=1 Type=ub
+
+
+.declare mudMSGHDR_DI_OUT2 Base=r23.0 ElementSize=4 Type=ud
+.declare mubMSGHDR_DI_OUT2 Base=r23.0 ElementSize=1 Type=ub
+
+//r45
+//Use r45 as message header, so no need to "mov" the data.
+
+.declare mudDN_Y_OUT Base=r45.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
+
+// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5
+.declare udDNDI_RESP Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
+.declare uwDNDI_RESP Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
+.declare ubDNDI_RESP Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
+
+// Message response (UV Copy); Use buffer 5
+.declare udDNDI_UV_RESP Base=r58.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
+.declare ubDNDI_UV_RESP Base=r58.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
+
+//Temp GRFs: For 42X to 422 Conversion
+.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw //8 GRFs
+.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub //8 GRFs
+//---------------------------------------------------------------------------
+// Message descriptors
+//---------------------------------------------------------------------------
+// Extended message descriptor
+ // Message descriptor for sampler read
+ // = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11)
+ // 1 (header present 1) 0 11 (SIMD32/64 mode)
+ // 1000 (message type) 0000 (DI state index)
+ // 00000000 (binding table index - set later)
+ // = 0x040b8000
+
+
+// Attention: The Message Length is The Number of GRFs with Data Only, without the Header
+
+
+//---------------------------------------------------------------------------
+// VDI Return Data format
+//---------------------------------------------------------------------------
+// Defines for DI enabled
+
+
+// Defines for DI disabled
+
+
+
+// FileName: DNDI_Command.asm
+// Author: Vivek Kumar
+// Description: Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block
+
+// Prepare the DNDI send command
+mov (8) mudMSGHDR_DNDI(0)<1> r0.0<8;8,1>:ud // message header
+mov (1) mwMSGHDR_DNDI(1,4)<1> r7.0<0;1,0>:w { NoDDClr } // horizontal origin // Do we need to add offset here? -vK
+mov (1) mwMSGHDR_DNDI(1,12)<1> r7.1<0;1,0>:w { NoDDChk } // vertical origin // Can these 2 be combined? - vK
+
+send (8) udDNDI_RESP(0)<1> r18 0x2 0x4AE8003:ud
+
+// On Gen6, with VDI walker, use the XY pair returned rather than programmed above
+// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled
+mov (2) r7.0<1>:w uwDNDI_RESP(9,14)<2;2,1> // horizontal/Vertial origin in W.14 and W.15
+
+
+
+// FileName: DI_STMM_Save.asm
+// Author: Vivek Kumar
+// Description: Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block)
+
+// Write STMM to memory
+mov (8) mudMSGHDR_STMM(0)<1> r0.0<8;8,1>:ud // message header
+mov (8) mudMSGHDR_STMM(1)<1> udDNDI_RESP(8,0) // Move STMM to MRF
+
+shr (1) mudMSGHDR_STMM(0,0)<1> r7.0<0;1,0>:w 1:w { NoDDClr } // X origin / 2
+mov (1) mudMSGHDR_STMM(0,1)<1> r7.1<0;1,0>:w { NoDDClr, NoDDChk } // Y origin
+mov (1) mudMSGHDR_STMM(0,2)<1> 0x30007:ud { NoDDChk } // block width and height (8x4)
+
+send (8) null<1>:d r20 0x5 0x40A8021:ud
+
+
+
+// FileName: DNDI_Enc_Stats_Save.asm
+// Author: Vivek Kumar
+// Description: Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block)
+
+// Write encoder statistics to memory
+//Currently enable this only on Gen6 validation
+mov (8) mudMSGHDR_ENC_STATS(1)<1> 0x0:ud // Init payload MRF
+mov (8) mudMSGHDR_ENC_STATS(0)<1> r0.0<8;8,1>:ud // message header
+
+shr (1) mudMSGHDR_ENC_STATS(0,0)<1> r7.0<0;1,0>:w 1:w { NoDDClr } //enable the flag after testing on si { NoDDClr } // X origin / 2
+mul (1) acc0.1<1>:ud r7.1<0;1,0>:w 3:w // Y origin * 3
+shr (1) mudMSGHDR_ENC_STATS(0,1)<1> acc0.1<0;1,0>:ud 2:w { NoDDClr, NoDDChk } //enable the flag after testing on si { NoDDClr, NoDDChk } // Y origin * 3/4
+mov (1) mudMSGHDR_ENC_STATS(0,2)<1> 0x20007:ud { NoDDChk } //enable the flag after testing on si { NoDDChk } // block width and height (8x3)
+add (2) mudMSGHDR_ENC_STATS(0,0)<1> mudMSGHDR_ENC_STATS(0,0)<2;2,1> r1.12<2;2,1>:uw // Add pitch to X,Y origin
+
+
+ //Data block for Encoder Statistics
+ //----------------------------------------------------
+ //| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | Bytes
+ //----------------------------------------------------
+ //| BNE | MCNT | FCNT | TCNT | X | X | X | X |
+ //----------------------------------------------------
+ //| DcTpT | SVCM | DcBpT | DcTpB |
+ //----------------------------------------------------
+ //| SHCM | STAD | DcTcB | DcBpB |
+ //----------------------------------------------------
+ mov (1) mudMSGHDR_ENC_STATS(1,0)<1> udDNDI_RESP(9,1)<0;1,0> { NoDDClr } // Move encoder statistics to MRF
+ mov (2) mudMSGHDR_ENC_STATS(1,3)<2> udDNDI_RESP(9,3)<2;2,1> { NoDDClr, NoDDChk } // Move encoder statistics to MRF
+ mov (2) mudMSGHDR_ENC_STATS(1,2)<2> udDNDI_RESP(9,5)<2;2,1> { NoDDChk } // Move encoder statistics to MRF
+
+
+send (8) null<1>:d r24 0x5 0x40A8021:ud
+
+
+
+// FileName: DI_Save_NV12_16x4.asm
+// Author: Vivek Kumar
+// Description: Save two 16x4 blocks of DI output in Packed format
+
+
+// add (4) a0.4<1>:uw r2.28<4;4,1>:ub 608:w // Initial Y,U,V offset in YUV422 block; it starts at m20
+
+mov (8) r28.0<1>:ud r0.0<8;8,1>:ud
+mov (1) r28.0<1>:d r7.0<0;1,0>:w { NoDDClr } // H. block origin need to be doubled
+mov (1) r28.1<1>:d r7.1<0;1,0>:w { NoDDClr, NoDDChk } // Block origin
+mov (1) r28.2<1>:ud 0x3000F:ud { NoDDChk } // Block width and height (32x8)
+
+//prepare the message headers
+mov (8) r18.0<1>:ud r28<8;8,1>:ud
+mov (8) r23.0<1>:ud r28<8;8,1>:ud
+
+//Bottom field Y
+mov (8) mudMSGHDR_DI_OUT1(1)<1> udDNDI_RESP(0,0)
+mov (8) mudMSGHDR_DI_OUT1(2)<1> udDNDI_RESP(0,8)
+// Top field Y
+mov (8) mudMSGHDR_DI_OUT2(1)<1> udDNDI_RESP(4,0)
+mov (8) mudMSGHDR_DI_OUT2(2)<1> udDNDI_RESP(4,8)
+
+//Change origin to U/V block
+asr (1) r28.1<1>:d r28.1<0;1,0>:d 1:w { NoDDClr } // U/V block origin should be half of Y's
+mov (1) r28.2<1>:ud 0x1000F:ud { NoDDChk } // Block width and height (16x2)
+
+// Bottom field U/V
+mov (16) r22.0<2>:ub ubDNDI_RESP(2, 1)<32;8,2> { NoDDClr }
+mov (16) r22.1<2>:ub ubDNDI_RESP(2, 0)<32;8,2> { NoDDChk }
+
+// Top field U/V
+mov (16) r27.0<2>:ub ubDNDI_RESP(6, 1)<32;8,2> { NoDDClr }
+mov (16) r27.1<2>:ub ubDNDI_RESP(6, 0)<32;8,2> { NoDDChk }
+
+//copy message desrcptor to the message header
+mov (8) r21<1>:ud r28<8;8,1>:ud
+mov (8) r26<1>:ud r28<8;8,1>:ud
+
+//Send out Y component on previous frame to surface
+send (8) null<1>:d r18 0x5 0x60A801B:ud
+//Send out Y component on current frame to surface
+send (8) null<1>:d r23 0x5 0x60A801E:ud
+//Send out U/V component on previous frame to surface
+send (8) null<1>:d r21 0x5 0x40A801C:ud
+//Send out U/V component on current frame to surface
+send (8) null<1>:d r26 0x5 0x40A801F:ud
+
+
+//End of Thread message
+
+mov (8) r127<1>:ud r0.0<8;8,1>:ud
+ send (1) null<1>:d r127 0x27 0x02000010
+
+
+.end_code
+.end_kernel
{ 0x00200c01, 0x432c0021, 0x004506ec, 0x00000000 },
{ 0x00200801, 0x43280021, 0x004506f4, 0x00000000 },
{ 0x05600031, 0x20000e24, 0x00000300, 0x040a8021 },
- { 0x00200401, 0x236001a5, 0x004500e0, 0x00000000 },
- { 0x00000801, 0x23680061, 0x00000000, 0x0003000f },
+ { 0x00600001, 0x23800021, 0x008d0000, 0x00000000 },
+ { 0x00000401, 0x238001a5, 0x000000e0, 0x00000000 },
+ { 0x00000c01, 0x238401a5, 0x000000e2, 0x00000000 },
+ { 0x00000801, 0x23880061, 0x00000000, 0x0003000f },
+ { 0x00600001, 0x22400021, 0x008d0380, 0x00000000 },
+ { 0x00600001, 0x22e00021, 0x008d0380, 0x00000000 },
{ 0x00600001, 0x22600021, 0x008d05c0, 0x00000000 },
{ 0x00600001, 0x22800021, 0x008d05e0, 0x00000000 },
{ 0x00600001, 0x23000021, 0x008d0640, 0x00000000 },
{ 0x00600001, 0x23200021, 0x008d0660, 0x00000000 },
- { 0x00600001, 0x22400021, 0x008d0360, 0x00000000 },
- { 0x00600001, 0x22e00021, 0x008d0360, 0x00000000 },
- { 0x0000040c, 0x23643ca5, 0x00000364, 0x00010001 },
- { 0x00000801, 0x23680061, 0x00000000, 0x0001000f },
- { 0x00800401, 0x42a00231, 0x00ce0601, 0x00000000 },
- { 0x00800801, 0x42a10231, 0x00ce0600, 0x00000000 },
- { 0x00800401, 0x43400231, 0x00ce0681, 0x00000000 },
- { 0x00800801, 0x43410231, 0x00ce0680, 0x00000000 },
- { 0x00600001, 0x22a00021, 0x008d0360, 0x00000000 },
- { 0x00600001, 0x23400021, 0x008d0360, 0x00000000 },
+ { 0x0000040c, 0x23843ca5, 0x00000384, 0x00010001 },
+ { 0x00000801, 0x23880061, 0x00000000, 0x0001000f },
+ { 0x00800401, 0x42c00231, 0x00ce0601, 0x00000000 },
+ { 0x00800801, 0x42c10231, 0x00ce0600, 0x00000000 },
+ { 0x00800401, 0x43600231, 0x00ce0681, 0x00000000 },
+ { 0x00800801, 0x43610231, 0x00ce0680, 0x00000000 },
+ { 0x00600001, 0x22a00021, 0x008d0380, 0x00000000 },
+ { 0x00600001, 0x23400021, 0x008d0380, 0x00000000 },
{ 0x05600031, 0x20000e24, 0x00000240, 0x060a801b },
{ 0x05600031, 0x20000e24, 0x000002e0, 0x060a801e },
{ 0x05600031, 0x20000e24, 0x000002a0, 0x040a801c },
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