OSDN Git Service

habanalabs: remove trailing blank line from EOF
authorOded Gabbay <oded.gabbay@gmail.com>
Sun, 31 Mar 2019 08:29:53 +0000 (11:29 +0300)
committerOded Gabbay <oded.gabbay@gmail.com>
Sun, 31 Mar 2019 08:29:53 +0000 (11:29 +0300)
GIT does not like extra blank lines at the end of the file, so this patch
removes those lines.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Mukesh Ojha <mojha@codeaurora.org>
91 files changed:
drivers/misc/habanalabs/include/goya/asic_reg/cpu_ca53_cfg_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/cpu_ca53_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/cpu_if_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/cpu_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_ch_0_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_ch_1_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_ch_2_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_ch_3_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_ch_4_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_macro_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_macro_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_nrtr_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_nrtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_0_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_0_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_1_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_2_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_3_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/dma_qm_4_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/ic_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mc_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme1_rtr_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/mme1_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme2_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme3_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme4_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme5_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme6_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_cmdq_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_qm_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mme_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/mmu_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/mmu_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/pci_nrtr_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/pci_nrtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/pcie_aux_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_emmc_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_global_conf_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_global_conf_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_mme_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_pci_pll_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/psoc_spi_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/sram_y0_x0_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/sram_y0_x1_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/sram_y0_x2_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/sram_y0_x3_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/sram_y0_x4_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/stlb_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/stlb_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_cfg_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_cmdq_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_eml_cfg_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_eml_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_nrtr_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_nrtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_qm_masks.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc0_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc1_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc1_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc1_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc1_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc2_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc2_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc2_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc2_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc3_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc3_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc3_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc3_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc4_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc4_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc4_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc4_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc5_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc5_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc5_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc5_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc6_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc6_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc6_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc6_rtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc7_cfg_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc7_cmdq_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc7_nrtr_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc7_qm_regs.h
drivers/misc/habanalabs/include/goya/asic_reg/tpc_pll_regs.h

index 2cf5c46..4e0dbbb 100644 (file)
 #define CPU_CA53_CFG_ARM_PMU_EVENT_MASK                              0x3FFFFFFF
 
 #endif /* ASIC_REG_CPU_CA53_CFG_MASKS_H_ */
-
index 840ccff..f3faf1a 100644 (file)
@@ -58,4 +58,3 @@
 #define mmCPU_CA53_CFG_ARM_PMU_1                                     0x441214
 
 #endif /* ASIC_REG_CPU_CA53_CFG_REGS_H_ */
-
index f23cb3e..cf65791 100644 (file)
@@ -46,4 +46,3 @@
 #define mmCPU_IF_AXI_SPLIT_INTR                                      0x442130
 
 #endif /* ASIC_REG_CPU_IF_REGS_H_ */
-
index 8fc97f8..8c8f972 100644 (file)
 #define mmCPU_PLL_FREQ_CALC_EN                                       0x4A2440
 
 #endif /* ASIC_REG_CPU_PLL_REGS_H_ */
-
index 61c8cd9..0b246fe 100644 (file)
 #define mmDMA_CH_0_MEM_INIT_BUSY                                     0x4011FC
 
 #endif /* ASIC_REG_DMA_CH_0_REGS_H_ */
-
index 92960ef..5449031 100644 (file)
 #define mmDMA_CH_1_MEM_INIT_BUSY                                     0x4091FC
 
 #endif /* ASIC_REG_DMA_CH_1_REGS_H_ */
-
index 4e37871..a476852 100644 (file)
 #define mmDMA_CH_2_MEM_INIT_BUSY                                     0x4111FC
 
 #endif /* ASIC_REG_DMA_CH_2_REGS_H_ */
-
index a2d6aeb..619d018 100644 (file)
 #define mmDMA_CH_3_MEM_INIT_BUSY                                     0x4191FC
 
 #endif /* ASIC_REG_DMA_CH_3_REGS_H_ */
-
index 400d6fd..038617e 100644 (file)
 #define mmDMA_CH_4_MEM_INIT_BUSY                                     0x4211FC
 
 #endif /* ASIC_REG_DMA_CH_4_REGS_H_ */
-
index 8d96544..f43b564 100644 (file)
 #define DMA_MACRO_RAZWI_HBW_RD_ID_R_MASK                             0x1FFFFFFF
 
 #endif /* ASIC_REG_DMA_MACRO_MASKS_H_ */
-
index 8bfcb00..c3bfc1b 100644 (file)
 #define mmDMA_MACRO_RAZWI_HBW_RD_ID                                  0x4B0158
 
 #endif /* ASIC_REG_DMA_MACRO_REGS_H_ */
-
index 9f33f35..bc97748 100644 (file)
 #define DMA_NRTR_NON_LIN_SCRAMB_EN_MASK                              0x1
 
 #endif /* ASIC_REG_DMA_NRTR_MASKS_H_ */
-
index d829374..c4abc7f 100644 (file)
 #define mmDMA_NRTR_NON_LIN_SCRAMB                                    0x1C0604
 
 #endif /* ASIC_REG_DMA_NRTR_REGS_H_ */
-
index 10619db..b17f72c 100644 (file)
 #define DMA_QM_0_CQ_BUF_RDATA_VAL_MASK                               0xFFFFFFFF
 
 #endif /* ASIC_REG_DMA_QM_0_MASKS_H_ */
-
index c693bc5..bf360b3 100644 (file)
 #define mmDMA_QM_0_CQ_BUF_RDATA                                      0x40030C
 
 #endif /* ASIC_REG_DMA_QM_0_REGS_H_ */
-
index da92839..51d432d 100644 (file)
 #define mmDMA_QM_1_CQ_BUF_RDATA                                      0x40830C
 
 #endif /* ASIC_REG_DMA_QM_1_REGS_H_ */
-
index b4f06e9..18fc0c2 100644 (file)
 #define mmDMA_QM_2_CQ_BUF_RDATA                                      0x41030C
 
 #endif /* ASIC_REG_DMA_QM_2_REGS_H_ */
-
index 53e3cd7..6cf7204 100644 (file)
 #define mmDMA_QM_3_CQ_BUF_RDATA                                      0x41830C
 
 #endif /* ASIC_REG_DMA_QM_3_REGS_H_ */
-
index e0eb5f2..36fef26 100644 (file)
 #define mmDMA_QM_4_CQ_BUF_RDATA                                      0x42030C
 
 #endif /* ASIC_REG_DMA_QM_4_REGS_H_ */
-
index 0a74381..4ae7fed 100644 (file)
 #define mmIC_PLL_FREQ_CALC_EN                                        0x4A3440
 
 #endif /* ASIC_REG_IC_PLL_REGS_H_ */
-
index 4408188..6d35d85 100644 (file)
 #define mmMC_PLL_FREQ_CALC_EN                                        0x4A1440
 
 #endif /* ASIC_REG_MC_PLL_REGS_H_ */
-
index 687bca5..6c23f8b 100644 (file)
 #define MME1_RTR_NON_LIN_SCRAMB_EN_MASK                              0x1
 
 #endif /* ASIC_REG_MME1_RTR_MASKS_H_ */
-
index c248339..122e9d5 100644 (file)
 #define mmMME1_RTR_NON_LIN_SCRAMB                                    0x40604
 
 #endif /* ASIC_REG_MME1_RTR_REGS_H_ */
-
index 7a2b777..00ce225 100644 (file)
 #define mmMME2_RTR_NON_LIN_SCRAMB                                    0x80604
 
 #endif /* ASIC_REG_MME2_RTR_REGS_H_ */
-
index b78f8bc..8e3eb7f 100644 (file)
 #define mmMME3_RTR_NON_LIN_SCRAMB                                    0xC0604
 
 #endif /* ASIC_REG_MME3_RTR_REGS_H_ */
-
index d9a4a02..79b67bb 100644 (file)
 #define mmMME4_RTR_NON_LIN_SCRAMB                                    0x100604
 
 #endif /* ASIC_REG_MME4_RTR_REGS_H_ */
-
index 205adc9..0ac3c37 100644 (file)
 #define mmMME5_RTR_NON_LIN_SCRAMB                                    0x140604
 
 #endif /* ASIC_REG_MME5_RTR_REGS_H_ */
-
index fcec683..50c49cc 100644 (file)
 #define mmMME6_RTR_NON_LIN_SCRAMB                                    0x180604
 
 #endif /* ASIC_REG_MME6_RTR_REGS_H_ */
-
index a0d4382..fe7d95b 100644 (file)
 #define MME_CMDQ_CQ_BUF_RDATA_VAL_MASK                               0xFFFFFFFF
 
 #endif /* ASIC_REG_MME_CMDQ_MASKS_H_ */
-
index 5c2f6b8..5f8b85d 100644 (file)
 #define mmMME_CMDQ_CQ_BUF_RDATA                                      0xD930C
 
 #endif /* ASIC_REG_MME_CMDQ_REGS_H_ */
-
index c7b1b0b..1882c41 100644 (file)
 #define MME_SHADOW_3_E_BUBBLES_PER_SPLIT_ID_MASK                     0xFF000000
 
 #endif /* ASIC_REG_MME_MASKS_H_ */
-
index d4bfa58..e464e38 100644 (file)
 #define MME_QM_CQ_BUF_RDATA_VAL_MASK                                 0xFFFFFFFF
 
 #endif /* ASIC_REG_MME_QM_MASKS_H_ */
-
index b5b1c77..538708b 100644 (file)
 #define mmMME_QM_CQ_BUF_RDATA                                        0xD830C
 
 #endif /* ASIC_REG_MME_QM_REGS_H_ */
-
index 9436b1e..0396cbf 100644 (file)
 #define mmMME_SHADOW_3_E_BUBBLES_PER_SPLIT                           0xD0BAC
 
 #endif /* ASIC_REG_MME_REGS_H_ */
-
index 3a78078..c3e6906 100644 (file)
 #define MMU_ACCESS_ERROR_CAPTURE_VA_VA_31_0_MASK                     0xFFFFFFFF
 
 #endif /* ASIC_REG_MMU_MASKS_H_ */
-
index bec6c01..7ec81f1 100644 (file)
@@ -50,4 +50,3 @@
 #define mmMMU_ACCESS_ERROR_CAPTURE_VA                                0x480040
 
 #endif /* ASIC_REG_MMU_REGS_H_ */
-
index 209e414..ceb59f2 100644 (file)
 #define PCI_NRTR_NON_LIN_SCRAMB_EN_MASK                              0x1
 
 #endif /* ASIC_REG_PCI_NRTR_MASKS_H_ */
-
index 447e5d4..dd067f3 100644 (file)
 #define mmPCI_NRTR_NON_LIN_SCRAMB                                    0x604
 
 #endif /* ASIC_REG_PCI_NRTR_REGS_H_ */
-
index daaf5d9..35b1d8a 100644 (file)
 #define mmPCIE_AUX_PERST                                             0xC079B8
 
 #endif /* ASIC_REG_PCIE_AUX_REGS_H_ */
-
index 8eda4de..9271ea9 100644 (file)
 #define mmPSOC_EMMC_PLL_FREQ_CALC_EN                                 0xC70440
 
 #endif /* ASIC_REG_PSOC_EMMC_PLL_REGS_H_ */
-
index d4bf0e1..3242666 100644 (file)
 #define PSOC_GLOBAL_CONF_PAD_SEL_VAL_MASK                            0x3
 
 #endif /* ASIC_REG_PSOC_GLOBAL_CONF_MASKS_H_ */
-
index cfbdd2c..8141f42 100644 (file)
 #define mmPSOC_GLOBAL_CONF_PAD_SEL_81                                0xC4BA44
 
 #endif /* ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_ */
-
index 6723d8f..4789ebb 100644 (file)
 #define mmPSOC_MME_PLL_FREQ_CALC_EN                                  0xC71440
 
 #endif /* ASIC_REG_PSOC_MME_PLL_REGS_H_ */
-
index abcded0..27a296e 100644 (file)
 #define mmPSOC_PCI_PLL_FREQ_CALC_EN                                  0xC72440
 
 #endif /* ASIC_REG_PSOC_PCI_PLL_REGS_H_ */
-
index 5925c74..66aee7f 100644 (file)
 #define mmPSOC_SPI_RSVD_2                                            0xC430FC
 
 #endif /* ASIC_REG_PSOC_SPI_REGS_H_ */
-
index d56c9fa..2ea1770 100644 (file)
@@ -80,4 +80,3 @@
 #define mmSRAM_Y0_X0_RTR_DBG_L_ARB_MAX                               0x201330
 
 #endif /* ASIC_REG_SRAM_Y0_X0_RTR_REGS_H_ */
-
index 5624544..37e0713 100644 (file)
@@ -80,4 +80,3 @@
 #define mmSRAM_Y0_X1_RTR_DBG_L_ARB_MAX                               0x205330
 
 #endif /* ASIC_REG_SRAM_Y0_X1_RTR_REGS_H_ */
-
index 3322bc0..d257227 100644 (file)
@@ -80,4 +80,3 @@
 #define mmSRAM_Y0_X2_RTR_DBG_L_ARB_MAX                               0x209330
 
 #endif /* ASIC_REG_SRAM_Y0_X2_RTR_REGS_H_ */
-
index 81e393d..68c5b40 100644 (file)
@@ -80,4 +80,3 @@
 #define mmSRAM_Y0_X3_RTR_DBG_L_ARB_MAX                               0x20D330
 
 #endif /* ASIC_REG_SRAM_Y0_X3_RTR_REGS_H_ */
-
index b2e11b1..a42f1ba 100644 (file)
@@ -80,4 +80,3 @@
 #define mmSRAM_Y0_X4_RTR_DBG_L_ARB_MAX                               0x211330
 
 #endif /* ASIC_REG_SRAM_Y0_X4_RTR_REGS_H_ */
-
index b4ea8ca..94f2ed4 100644 (file)
 #define STLB_SRAM_INIT_BUSY_DATA_MASK                                0x10
 
 #endif /* ASIC_REG_STLB_MASKS_H_ */
-
index 0f5281d..35013f6 100644 (file)
@@ -52,4 +52,3 @@
 #define mmSTLB_SRAM_INIT                                             0x49004C
 
 #endif /* ASIC_REG_STLB_REGS_H_ */
-
index e5587b4..89c9507 100644 (file)
 #define TPC0_CFG_FUNC_MBIST_MEM_LAST_FAILED_PATTERN_MASK             0x70000000
 
 #endif /* ASIC_REG_TPC0_CFG_MASKS_H_ */
-
index 2be28a6..7d71c4b 100644 (file)
 #define mmTPC0_CFG_FUNC_MBIST_MEM_9                                  0xE06E2C
 
 #endif /* ASIC_REG_TPC0_CFG_REGS_H_ */
-
index 9aa2d8b..9395f24 100644 (file)
 #define TPC0_CMDQ_CQ_BUF_RDATA_VAL_MASK                              0xFFFFFFFF
 
 #endif /* ASIC_REG_TPC0_CMDQ_MASKS_H_ */
-
index 3572752..bc51df5 100644 (file)
 #define mmTPC0_CMDQ_CQ_BUF_RDATA                                     0xE0930C
 
 #endif /* ASIC_REG_TPC0_CMDQ_REGS_H_ */
-
index ed866d9..553c6b6 100644 (file)
 #define TPC0_EML_CFG_DBG_INST_INSERT_CTL_INSERT_MASK                 0x1
 
 #endif /* ASIC_REG_TPC0_EML_CFG_MASKS_H_ */
-
index f1a1b4f..8495479 100644 (file)
 #define mmTPC0_EML_CFG_DBG_INST_INSERT_CTL                           0x3040334
 
 #endif /* ASIC_REG_TPC0_EML_CFG_REGS_H_ */
-
index 7f86621..43fafcf 100644 (file)
 #define TPC0_NRTR_NON_LIN_SCRAMB_EN_MASK                             0x1
 
 #endif /* ASIC_REG_TPC0_NRTR_MASKS_H_ */
-
index dc280f4..ce3346d 100644 (file)
 #define mmTPC0_NRTR_NON_LIN_SCRAMB                                   0xE00604
 
 #endif /* ASIC_REG_TPC0_NRTR_REGS_H_ */
-
index 80d97ee..2e4b459 100644 (file)
 #define TPC0_QM_CQ_BUF_RDATA_VAL_MASK                                0xFFFFFFFF
 
 #endif /* ASIC_REG_TPC0_QM_MASKS_H_ */
-
index 7552d4b..4fa09eb 100644 (file)
 #define mmTPC0_QM_CQ_BUF_RDATA                                       0xE0830C
 
 #endif /* ASIC_REG_TPC0_QM_REGS_H_ */
-
index 1989441..928eef1 100644 (file)
 #define mmTPC1_CFG_FUNC_MBIST_MEM_9                                  0xE46E2C
 
 #endif /* ASIC_REG_TPC1_CFG_REGS_H_ */
-
index 9099ebd..30ae0f3 100644 (file)
 #define mmTPC1_CMDQ_CQ_BUF_RDATA                                     0xE4930C
 
 #endif /* ASIC_REG_TPC1_CMDQ_REGS_H_ */
-
index bc8b9a1..b95de4f 100644 (file)
 #define mmTPC1_QM_CQ_BUF_RDATA                                       0xE4830C
 
 #endif /* ASIC_REG_TPC1_QM_REGS_H_ */
-
index ae267f8..0f91e30 100644 (file)
 #define mmTPC1_RTR_NON_LIN_SCRAMB                                    0xE40604
 
 #endif /* ASIC_REG_TPC1_RTR_REGS_H_ */
-
index 9c33fc0..7342122 100644 (file)
 #define mmTPC2_CFG_FUNC_MBIST_MEM_9                                  0xE86E2C
 
 #endif /* ASIC_REG_TPC2_CFG_REGS_H_ */
-
index 7a64388..27b66bf 100644 (file)
 #define mmTPC2_CMDQ_CQ_BUF_RDATA                                     0xE8930C
 
 #endif /* ASIC_REG_TPC2_CMDQ_REGS_H_ */
-
index f3e32c0..31e5b2f 100644 (file)
 #define mmTPC2_QM_CQ_BUF_RDATA                                       0xE8830C
 
 #endif /* ASIC_REG_TPC2_QM_REGS_H_ */
-
index 0eb0cd1..4eddeaa 100644 (file)
 #define mmTPC2_RTR_NON_LIN_SCRAMB                                    0xE80604
 
 #endif /* ASIC_REG_TPC2_RTR_REGS_H_ */
-
index 0baf63c..ce573a1 100644 (file)
 #define mmTPC3_CFG_FUNC_MBIST_MEM_9                                  0xEC6E2C
 
 #endif /* ASIC_REG_TPC3_CFG_REGS_H_ */
-
index 82a5261..11d81fc 100644 (file)
 #define mmTPC3_CMDQ_CQ_BUF_RDATA                                     0xEC930C
 
 #endif /* ASIC_REG_TPC3_CMDQ_REGS_H_ */
-
index b05b1e1..e41595a 100644 (file)
 #define mmTPC3_QM_CQ_BUF_RDATA                                       0xEC830C
 
 #endif /* ASIC_REG_TPC3_QM_REGS_H_ */
-
index 5a2fd76..34a438b 100644 (file)
 #define mmTPC3_RTR_NON_LIN_SCRAMB                                    0xEC0604
 
 #endif /* ASIC_REG_TPC3_RTR_REGS_H_ */
-
index d64a100..d44caf0 100644 (file)
 #define mmTPC4_CFG_FUNC_MBIST_MEM_9                                  0xF06E2C
 
 #endif /* ASIC_REG_TPC4_CFG_REGS_H_ */
-
index 565b428..f13a653 100644 (file)
 #define mmTPC4_CMDQ_CQ_BUF_RDATA                                     0xF0930C
 
 #endif /* ASIC_REG_TPC4_CMDQ_REGS_H_ */
-
index 196da3f..db081fc 100644 (file)
 #define mmTPC4_QM_CQ_BUF_RDATA                                       0xF0830C
 
 #endif /* ASIC_REG_TPC4_QM_REGS_H_ */
-
index 8b54041..8c53723 100644 (file)
 #define mmTPC4_RTR_NON_LIN_SCRAMB                                    0xF00604
 
 #endif /* ASIC_REG_TPC4_RTR_REGS_H_ */
-
index 3f00954..5139fde 100644 (file)
 #define mmTPC5_CFG_FUNC_MBIST_MEM_9                                  0xF46E2C
 
 #endif /* ASIC_REG_TPC5_CFG_REGS_H_ */
-
index d8e72a8..1e7cd6e 100644 (file)
 #define mmTPC5_CMDQ_CQ_BUF_RDATA                                     0xF4930C
 
 #endif /* ASIC_REG_TPC5_CMDQ_REGS_H_ */
-
index be2e686..ac0d382 100644 (file)
 #define mmTPC5_QM_CQ_BUF_RDATA                                       0xF4830C
 
 #endif /* ASIC_REG_TPC5_QM_REGS_H_ */
-
index 6f301c7..57f83bc 100644 (file)
 #define mmTPC5_RTR_NON_LIN_SCRAMB                                    0xF40604
 
 #endif /* ASIC_REG_TPC5_RTR_REGS_H_ */
-
index 1e11686..94e0191 100644 (file)
 #define mmTPC6_CFG_FUNC_MBIST_MEM_9                                  0xF86E2C
 
 #endif /* ASIC_REG_TPC6_CFG_REGS_H_ */
-
index fbca6b4..7a1a0e8 100644 (file)
 #define mmTPC6_CMDQ_CQ_BUF_RDATA                                     0xF8930C
 
 #endif /* ASIC_REG_TPC6_CMDQ_REGS_H_ */
-
index bf32465..80fa0fe 100644 (file)
 #define mmTPC6_QM_CQ_BUF_RDATA                                       0xF8830C
 
 #endif /* ASIC_REG_TPC6_QM_REGS_H_ */
-
index 609bb90..d6cae8b 100644 (file)
 #define mmTPC6_RTR_NON_LIN_SCRAMB                                    0xF80604
 
 #endif /* ASIC_REG_TPC6_RTR_REGS_H_ */
-
index bf2fd0f..234147a 100644 (file)
 #define mmTPC7_CFG_FUNC_MBIST_MEM_9                                  0xFC6E2C
 
 #endif /* ASIC_REG_TPC7_CFG_REGS_H_ */
-
index 65d8304..4c16063 100644 (file)
 #define mmTPC7_CMDQ_CQ_BUF_RDATA                                     0xFC930C
 
 #endif /* ASIC_REG_TPC7_CMDQ_REGS_H_ */
-
index 3d5848d..0c13d4d 100644 (file)
 #define mmTPC7_NRTR_NON_LIN_SCRAMB                                   0xFC0604
 
 #endif /* ASIC_REG_TPC7_NRTR_REGS_H_ */
-
index 25f5095..cbe1142 100644 (file)
 #define mmTPC7_QM_CQ_BUF_RDATA                                       0xFC830C
 
 #endif /* ASIC_REG_TPC7_QM_REGS_H_ */
-
index 920231d..e25e196 100644 (file)
 #define mmTPC_PLL_FREQ_CALC_EN                                       0xE01440
 
 #endif /* ASIC_REG_TPC_PLL_REGS_H_ */
-