add support for loading FP constants +0.0 and +1.0 to the dag isel,

stop pretending -0.0 and -1.0 are machine constants

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24146 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
index 1a83d89..d3487f2 100644 (file)
--- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp
+++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
@@ -321,6 +321,14 @@ SDOperand IA64DAGToDAGISel::Select(SDOperand Op) {
 /* todo:
  * case ISD::DYNAMIC_STACKALLOC:
 */
+  case ISD::ConstantFP: {
+    if (cast<ConstantFPSDNode>(N)->isExactlyValue(+0.0))
+      return CurDAG->getRegister(IA64::F0, MVT::f64); // load 0.0
+    else if (cast<ConstantFPSDNode>(N)->isExactlyValue(+1.0))
+      return CurDAG->getRegister(IA64::F1, MVT::f64); // load 1.0
+    else
+      assert(0 && "Unexpected FP constant!");
+  }
 
   case ISD::FrameIndex: { // TODO: reduce creepyness
     int FI = cast<FrameIndexSDNode>(N)->getIndex();

diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp
index 2ffa24e..37f15ee 100644 (file)
--- a/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/lib/Target/IA64/IA64ISelLowering.cpp
@@ -80,9 +80,6 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
 
       addLegalFPImmediate(+0.0);
       addLegalFPImmediate(+1.0);
-      addLegalFPImmediate(-0.0);
-      addLegalFPImmediate(-1.0);
-    
 }
 
 /// isFloatingPointZero - Return true if this is 0.0 or -0.0.