Fix a problem with DAGCombine where we were building an illegal build

vector shuffle mask. Forced the mask to be built using i32.  Note: this will
be irrelevant once vector_shuffle no longer takes a build vector for the
shuffle mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67076 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3e517cf..db4b392 100644 (file)
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5164,30 +5164,35 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
   }
 
   // If everything is good, we can make a shuffle operation.
+  MVT IndexVT = MVT::i32;
   if (VecIn1.getNode()) {
     SmallVector<SDValue, 8> BuildVecIndices;
     for (unsigned i = 0; i != NumInScalars; ++i) {
       if (N->getOperand(i).getOpcode() == ISD::UNDEF) {
-        BuildVecIndices.push_back(DAG.getUNDEF(TLI.getPointerTy()));
+        BuildVecIndices.push_back(DAG.getUNDEF(IndexVT));
         continue;
       }
 
       SDValue Extract = N->getOperand(i);
 
       // If extracting from the first vector, just use the index directly.
+      SDValue ExtVal = Extract.getOperand(1);
       if (Extract.getOperand(0) == VecIn1) {
-        BuildVecIndices.push_back(Extract.getOperand(1));
+        if (ExtVal.getValueType() == IndexVT)
+          BuildVecIndices.push_back(ExtVal);
+        else {
+          unsigned Idx = cast<ConstantSDNode>(ExtVal)->getZExtValue();
+          BuildVecIndices.push_back(DAG.getConstant(Idx, IndexVT));
+        }
         continue;
       }
 
       // Otherwise, use InIdx + VecSize
-      unsigned Idx =
-        cast<ConstantSDNode>(Extract.getOperand(1))->getZExtValue();
-      BuildVecIndices.push_back(DAG.getIntPtrConstant(Idx+NumInScalars));
+      unsigned Idx = cast<ConstantSDNode>(ExtVal)->getZExtValue();
+      BuildVecIndices.push_back(DAG.getConstant(Idx+NumInScalars, IndexVT));
     }
 
     // Add count and size info.
-    MVT IndexVT = MVT::getIntegerVT(EltType.getSizeInBits());
     MVT BuildVecVT = MVT::getVectorVT(IndexVT, NumElts);
     if (!TLI.isTypeLegal(BuildVecVT) && LegalTypes)
       return SDValue();

diff --git a/test/CodeGen/X86/dagcombine-buildvector.ll b/test/CodeGen/X86/dagcombine-buildvector.ll
new file mode 100644 (file)
index 0000000..2ca4177
--- /dev/null
+++ b/test/CodeGen/X86/dagcombine-buildvector.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=x86 -o %t -f
+; RUN: grep unpcklpd %t | count 1
+; RUN: grep movapd %t | count 1
+
+; Shows a dag combine bug that will generate an illegal build vector
+; with v2i64 build_vector i32, i32.
+
+define void @test(<2 x double>* %dst, <4 x double> %src) {
+entry:
+        %tmp7.i = shufflevector <4 x double> %src, <4 x double> undef, <2 x i32> < i32 0, i32 2 >
+        store <2 x double> %tmp7.i, <2 x double>* %dst
+        ret void
+}                                             
\ No newline at end of file