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arm64: dts: allwinner: A64: Limit MMC2 bus frequency to 150 MHz
authorAndre Przywara <andre.przywara@arm.com>
Wed, 13 Jan 2021 15:26:28 +0000 (15:26 +0000)
committerMaxime Ripard <maxime@cerno.tech>
Thu, 14 Jan 2021 11:50:22 +0000 (12:50 +0100)
In contrast to the H6 (and later) manuals, the A64 datasheet does not
specify any limitations in the maximum possible frequency for eMMC
controllers.
However experimentation has found that a 150 MHz limit similar to other
SoCs and also the MMC0 and MMC1 controllers on the A64 seems to exist
for the MMC2 controller.

Limit the frequency for the MMC2 controller to 150 MHz in the SoC .dtsi.
The Pinebook seems to be the an odd exception, since it apparently seems
to work with 200 MHz as well, so overwrite this in its board .dts file.

Tested on a Pine64-LTS: 200 MHz HS-200 fails, 150 MHz HS-200 works.

Fixes: 22be992faea7 ("arm64: allwinner: a64: Increase the MMC max frequency")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210113152630.28810-7-andre.przywara@arm.com
arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi

index d07cf05..7ae1654 100644 (file)
        pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
        vmmc-supply = <&reg_dcdc1>;
        vqmmc-supply = <&reg_eldo1>;
+       max-frequency = <200000000>;
        bus-width = <8>;
        non-removable;
        cap-mmc-hw-reset;
index 19e9b8c..57786fc 100644 (file)
                        resets = <&ccu RST_BUS_MMC2>;
                        reset-names = "ahb";
                        interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-                       max-frequency = <200000000>;
+                       max-frequency = <150000000>;
                        status = "disabled";
                        #address-cells = <1>;
                        #size-cells = <0>;