if (Constraint.size() == 1) {
switch (Constraint[0]) {
case 'r':
- if (VT == MVT::v2i32 || VT == MVT::f64)
+ if (VT == MVT::v2i32)
return std::make_pair(0U, &SP::IntPairRegClass);
else
return std::make_pair(0U, &SP::IntRegsRegClass);
tail call void asm sideeffect "faddd $0,$1,$2", "{f20},{f20},{f20}"(double 9.0, double 10.0, double 11.0)
ret void
}
-
-; CHECK-LABEL: test_constraint_r_f64:
-; CHECK: std %o0, [%sp+96]
-; CHECK: ldd [%sp+96], %f0
-define double @test_constraint_r_f64() {
-entry:
- %0 = call double asm sideeffect "", "=r"()
- ret double %0
-}