gas/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* config/tc-i386.c (match_template): Properly handle 64bit mode
	"xchg %eax, %eax".

gas/testsuite/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* gas/i386/nops.s: Add testcases for nop r/m.
	* gas/i386/x86-64-nops.s: Likewise.

	* gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax,
	%eax and %rax.

	* gas/i386/nops.d: Updated.
	* gas/i386/x86-64-nops.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* i386-dis.c (PREGRP38): New.
	(dis386): Use PREGRP38 for 0x90.
	(prefix_user_table): Add PREGRP38.
	(print_insn): Set uses_REPZ_prefix to 1 for pause.
	(NOP_Fixup1): Properly handle REX bits.
	(NOP_Fixup2): Likewise.

	* i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
	Allow register with nop.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 00a328a..300cc47 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,16 @@
+2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/4218
+       * i386-dis.c (PREGRP38): New.
+       (dis386): Use PREGRP38 for 0x90.
+       (prefix_user_table): Add PREGRP38.
+       (print_insn): Set uses_REPZ_prefix to 1 for pause.
+       (NOP_Fixup1): Properly handle REX bits.
+       (NOP_Fixup2): Likewise.
+
+       * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
+       Allow register with nop.
+
 2007-03-20  DJ Delorie  <dj@redhat.com>
 
        * m32c-asm.c: Regenerate.

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 29db63d..6983418 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -467,6 +467,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define PREGRP35  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
 #define PREGRP36  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
 #define PREGRP37  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
+#define PREGRP38  NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
 
 
 #define X86_64_0  NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
@@ -692,7 +693,7 @@ static const struct dis386 dis386[] = {
   { "movD",            { Sw, Sv } },
   { "popU",            { stackEv } },
   /* 90 */
-  { "xchgS",           { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
+  { PREGRP38 },
   { "xchgS",           { RMeCX, eAX } },
   { "xchgS",           { RMeDX, eAX } },
   { "xchgS",           { RMeBX, eAX } },
@@ -2017,6 +2018,14 @@ static const struct dis386 prefix_user_table[][4] = {
     { "(bad)", { XX } },
     { "(bad)", { XX } },    
   },
+
+  /* PREGRP38 */
+  {
+    { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
+    { "pause", { XX } },
+    { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
+    { "(bad)", { XX } },    
+  },
 };
 
 static const struct dis386 x86_64_table[][2] = {
@@ -3091,7 +3100,8 @@ print_insn (bfd_vma pc, disassemble_info *info)
       need_modrm = onebyte_has_modrm[*codep];
       uses_DATA_prefix = 0;
       uses_REPNZ_prefix = 0;
-      uses_REPZ_prefix = 0;
+      /* pause is 0xf3 0x90.  */
+      uses_REPZ_prefix = *codep == 0x90;
       uses_LOCK_prefix = 0;
       codep++;
     }
@@ -5284,17 +5294,15 @@ OP_0fae (int bytemode, int sizeflag)
 }
 
 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
-   32bit mode and "xchg %rax,%rax" in 64bit mode.  NOP with REPZ prefix
-   is called PAUSE.  We display "xchg %ax,%ax" instead of "data16 nop".
- */
+   32bit mode and "xchg %rax,%rax" in 64bit mode.  */  
 
 static void
 NOP_Fixup1 (int bytemode, int sizeflag)
 {
-  if (prefixes == PREFIX_REPZ)
-    strcpy (obuf, "pause");
-  else if (prefixes == PREFIX_DATA
-          || ((rex & REX_MODE64) && rex != 0x48))
+  if ((prefixes & PREFIX_DATA) != 0
+      || (rex != 0
+         && rex != 0x48
+         && address_mode == mode_64bit))
     OP_REG (bytemode, sizeflag);
   else
     strcpy (obuf, "nop");
@@ -5303,8 +5311,10 @@ NOP_Fixup1 (int bytemode, int sizeflag)
 static void
 NOP_Fixup2 (int bytemode, int sizeflag)
 {
-  if (prefixes == PREFIX_DATA
-      || ((rex & REX_MODE64) && rex != 0x48))
+  if ((prefixes & PREFIX_DATA) != 0
+      || (rex != 0
+         && rex != 0x48
+         && address_mode == mode_64bit))
     OP_IMREG (bytemode, sizeflag);
 }
 

diff --git a/opcodes/i386-opc.c b/opcodes/i386-opc.c
index 9c96113..373b1dd 100644 (file)
--- a/opcodes/i386-opc.c
+++ b/opcodes/i386-opc.c
@@ -144,12 +144,10 @@ const template i386_optab[] =
    xchg commutes:  we allow both operand orders.
  
    In the 64bit code, xchg rax, rax is reused for new nop instruction.  */
-{"xchg",   2,  0x90, X, CpuNo64, wl_Suf|ShortForm,     { WordReg, Acc, 0 } },
-{"xchg",   2,  0x90, X, CpuNo64, wl_Suf|ShortForm,     { Acc, WordReg, 0 } },
-{"xchg",   2,  0x90, X, Cpu64, wq_Suf|ShortForm,       { Reg16|Reg64, Acc, 0 } },
-{"xchg",   2,  0x90, X, Cpu64, wq_Suf|ShortForm,       { Acc, Reg16|Reg64, 0 } },
-{"xchg",   2,  0x86, X, 0,      bwlq_Suf|W|Modrm,      { Reg, Reg|AnyMem, 0 } },
-{"xchg",   2,  0x86, X, 0,      bwlq_Suf|W|Modrm,      { Reg|AnyMem, Reg, 0 } },
+{"xchg",   2,  0x90, X, 0,     wlq_Suf|ShortForm,      { WordReg, Acc, 0 } },
+{"xchg",   2,  0x90, X, 0,     wlq_Suf|ShortForm,      { Acc, WordReg, 0 } },
+{"xchg",   2,  0x86, X, 0,     bwlq_Suf|W|Modrm,       { Reg, Reg|AnyMem, 0 } },
+{"xchg",   2,  0x86, X, 0,     bwlq_Suf|W|Modrm,       { Reg|AnyMem, Reg, 0 } },
 
 /* In/out from ports.  */
 /* XXX should reject %rax */
@@ -517,7 +515,7 @@ const template i386_optab[] =
 
 {"hlt",           0,   0xf4, X, 0,      NoSuf,                 { 0, 0, 0} },
 
-{"nop",    1, 0x0f1f, X, Cpu686, wl_Suf|Modrm,         { WordMem, 0, 0} },
+{"nop",    1, 0x0f1f, 0, Cpu686, wlq_Suf|Modrm,                { WordReg|WordMem, 0, 0} },
 
 /* nop is actually "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
    32bit mode and "xchg %rax,%rax" in 64bit mode.  */