[VM][FM7] Wait is CPU wait, not MEMORY WAIT.

[VM][FM7] Calcurate more correctness wait parameter (with DRAM REFRESH), Thanks to Ryu Takegami.

diff --git a/source/src/vm/fm7/fm7.cpp b/source/src/vm/fm7/fm7.cpp
index 8bc135e..bc70225 100644 (file)
--- a/source/src/vm/fm7/fm7.cpp
+++ b/source/src/vm/fm7/fm7.cpp
@@ -371,22 +371,7 @@ void VM::connect_bus(void)
         */
        event->set_frames_per_sec(FRAMES_PER_SEC);
        event->set_lines_per_frame(LINES_PER_FRAME);
-#if defined(_FM8)
-       mainclock = MAINCLOCK_SLOW;
-       subclock = SUBCLOCK_SLOW;
-#else
-       if(config.cpu_type == 0) {
-               // 2MHz
-               subclock = SUBCLOCK_NORMAL;
-               mainclock = MAINCLOCK_NORMAL;
-       } else {
-               // 1.2MHz
-               mainclock = MAINCLOCK_SLOW;
-               subclock = SUBCLOCK_SLOW;
-       }
-       //if((config.dipswitch & FM7_DIPSW_CYCLESTEAL) != 0) subclock = subclock / 3;
-#endif
-       mainclock = CPU_CLOCKS;
+       mainclock = CPU_CLOCKS; // Hack
        subclock = SUBCLOCK_NORMAL;
 
        event->set_context_cpu(maincpu, mainclock);

diff --git a/source/src/vm/fm7/fm7_mainmem.cpp b/source/src/vm/fm7/fm7_mainmem.cpp
index 3203b96..3bd31ea 100644 (file)
--- a/source/src/vm/fm7/fm7_mainmem.cpp
+++ b/source/src/vm/fm7/fm7_mainmem.cpp
@@ -27,7 +27,6 @@ FM7_MAINMEM::FM7_MAINMEM(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, par
        fm7_mainmem_extram = NULL;
 #endif
        cpu_clocks = CPU_CLOCKS;
-       event_memorywait = -1;
        // Initialize table
        set_device_name(_T("MAIN MEMORY"));
 }
@@ -118,63 +117,52 @@ void FM7_MAINMEM::setclock(int mode)
 #endif         
        } else {
 #if defined(HAS_MMR)
-               if(window_enabled) {
-                       if(window_fast) {
-                               clock = MAINCLOCK_FAST_MMR;
-                       } else {
-                               clock = MAINCLOCK_MMR;
-                       }
-               } else if(mmr_enabled) {
-                       if(mmr_fast) {
-                               clock = MAINCLOCK_FAST_MMR;
+#  if defined(_FM77AV40) || defined(_FM77AV40EX) || defined(_FM77AV40SX)
+               // Thanks to Ryu Takegami, around DRAM refresh.
+               // DRAM refresh makes halting MAIN MPU per 13.02uS.
+               if(!mmr_fast && !window_fast) { // SLOW
+                       if(refresh_fast) {
+                               clock = MAINCLOCK_FAST_MMR - ((100000000 / 1302) * 1);  // Fast Refresh: 1wait
                        } else {
-                               clock = MAINCLOCK_MMR;
-                       }
+                               clock = MAINCLOCK_FAST_MMR - ((100000000 / 1302) * 3);  // Slow Refresh: 3Wait(!)
+                       }                               
+                       if(mmr_enabled || window_enabled) {
+                               clock = (uint32_t)((double)clock * 0.87);
+                       }                                       
                } else {
-                       // fix by Ryu Takegami
-                       if(mmr_fast) {
-                               clock = MAINCLOCK_FAST_MMR;
-                       } else {
-                               clock = MAINCLOCK_NORMAL;
-                       }
+                       clock = MAINCLOCK_FAST_MMR;
+                       //if(!(mmr_enabled) && !(window_enabled)) clock = MAINCLOCK_NORMAL;
                }
-               if(!mmr_fast && !window_fast) {
-                       if(refresh_fast) {
-                               if(mmr_enabled || window_enabled) {
-                                       clock = (uint32_t)((double)clock * 1.089);
-                               } else {
-                                       clock = (uint32_t)((double)clock * 1.086);
-                               }                                       
-                       }
+#  else
+               if(mmr_enabled || window_enabled) {
+                       clock = MAINCLOCK_MMR;
+               } else {
+                       clock = MAINCLOCK_NORMAL;
                }
+#  endif
 #else
                clock = MAINCLOCK_NORMAL;
 #endif                         
        }
        //mem_waitcount = 0;
-       if(CPU_CLOCKS >= clock) {
-               mem_waitfactor = (uint32_t)(4096.0 * (1.0 - ((double)clock / (double)CPU_CLOCKS)));
+       uint32_t before_waitfactor = mem_waitfactor;
+       if(CPU_CLOCKS > clock) {
+               mem_waitfactor = (uint32_t)(65536.0 * ((1.0 - (double)clock / (double)CPU_CLOCKS)));
                //out_debug_log(_T("CLOCK=%d WAIT FACTOR=%d"), clock, mem_waitfactor);
        } else {
                mem_waitfactor = 0;
+               //out_debug_log(_T("CLOCK=%d WAIT FACTOR=%d"), clock, mem_waitfactor);
        }
        cpu_clocks = clock;
+       // Below is ugly hack cause of CPU#0 cannot modify clock.
+       if(before_waitfactor != mem_waitfactor) maincpu->write_signal(SIG_CPU_WAIT_FACTOR, mem_waitfactor, 0xffffffff);
 }
                
-void FM7_MAINMEM::cpuwait()
-{
-       mem_waitcount += mem_waitfactor;
-       if(mem_waitcount >= 4096) {
-               uint32_t val = mem_waitcount / 4096;
-               if(maincpu != NULL) maincpu->set_extra_clock(val); // 
-               mem_waitcount = mem_waitcount & 0x0fff;
-       }
-}
 
 void FM7_MAINMEM::iowait()
 {
        int _waitfactor = 0;
-       if(!clockmode) return; // SLOW
+       if(config.cpu_type == 1) return; // SLOW
 #ifdef HAS_MMR
        if((window_enabled) || (mmr_enabled)) {
                if(!ioaccess_wait) {
@@ -192,8 +180,7 @@ void FM7_MAINMEM::iowait()
        if(_waitfactor <= 0) return;
        waitcount++;
        if(waitcount >= _waitfactor) {
-               mem_waitcount += 4096;
-               cpuwait();
+               maincpu->set_extra_clock(1);
                waitcount = 0;
                ioaccess_wait = !ioaccess_wait;
        }
@@ -378,7 +365,6 @@ uint32_t FM7_MAINMEM::read_dma_data8(uint32_t addr)
 {
 #if defined(HAS_MMR)   
        uint32_t val;
-       cpuwait();
        val = this->read_data8_main(addr & 0xffff, true);
        return val;
 #else
@@ -390,7 +376,6 @@ uint32_t FM7_MAINMEM::read_dma_io8(uint32_t addr)
 {
 #if defined(HAS_MMR)   
        uint32_t val;
-       cpuwait();
        val = this->read_data8_main(addr & 0xffff, true);
        return val;
 #else
@@ -418,14 +403,12 @@ uint32_t FM7_MAINMEM::read_data8(uint32_t addr)
                return 0xff;
        }
 #endif   
-       cpuwait();
        return read_data8_main(addr, false);
 }
 
 void FM7_MAINMEM::write_dma_data8(uint32_t addr, uint32_t data)
 {
 #if defined(HAS_MMR)
-       cpuwait();
        this->write_data8_main(addr & 0xffff, data, true);
 #else
        this->write_data8(addr & 0xffff, data);
@@ -435,7 +418,6 @@ void FM7_MAINMEM::write_dma_data8(uint32_t addr, uint32_t data)
 void FM7_MAINMEM::write_dma_io8(uint32_t addr, uint32_t data)
 {
 #if defined(HAS_MMR)
-       cpuwait();
        this->write_data8_main(addr & 0xffff, data, true);
 #else
        this->write_data8(addr & 0xffff, data);
@@ -467,7 +449,6 @@ void FM7_MAINMEM::write_data8(uint32_t addr, uint32_t data)
                return;
        }
 #endif
-       cpuwait();
        write_data8_main(addr, data, false);
 }
 

diff --git a/source/src/vm/fm7/fm7_mainmem.h b/source/src/vm/fm7/fm7_mainmem.h
index 8a2a743..09f0a1e 100644 (file)
--- a/source/src/vm/fm7/fm7_mainmem.h
+++ b/source/src/vm/fm7/fm7_mainmem.h
@@ -151,7 +151,6 @@ class FM7_MAINMEM : public DEVICE
        bool diag_load_bootrom_sfd8;
        bool diag_load_bootrom_2hd;
 
-       int event_memorywait;
        uint32_t mem_waitfactor;
        uint32_t mem_waitcount;
 
@@ -212,7 +211,7 @@ class FM7_MAINMEM : public DEVICE
    
        void initialize(void);
        void iowait(void);
-       void cpuwait(void);
+       void dram_refresh(void);
        void reset(void);
        void release(void);
 

diff --git a/source/src/vm/fm7/mainmem_readseq.cpp b/source/src/vm/fm7/mainmem_readseq.cpp
index cd9ba90..fce3f93 100644 (file)
--- a/source/src/vm/fm7/mainmem_readseq.cpp
+++ b/source/src/vm/fm7/mainmem_readseq.cpp
@@ -66,6 +66,7 @@ uint8_t FM7_MAINMEM::read_data(uint32_t addr, bool dmamode)
 # ifdef _FM77AV_VARIANTS
                        else if(mmr_bank == 0x3f) {
                                if((raddr >= 0xd80) && (raddr <= 0xd97)) { // MMR AREA
+                                       iowait(); // OK?
                                        return 0xff;
                                } else {
                                        raddr = raddr | 0x3f000;
@@ -123,11 +124,13 @@ uint32_t FM7_MAINMEM::read_data8_main(uint32_t addr, bool dmamode)
        if(initiator_enabled) {
                if((addr >= 0x6000) && (addr < 0x8000)) {
                        uint32_t raddr = addr - 0x6000;
+                       iowait();
                        return fm7_mainmem_initrom[raddr];
                }
                if((addr >= 0xfffe) && (addr < 0x10000)) {
                        uint32_t raddr = addr - 0xe000;
                        //printf("%04x %02x\n", raddr, fm7_mainmem_initrom[raddr]);
+                       iowait();
                        return fm7_mainmem_initrom[raddr];
                }
        }
@@ -180,8 +183,9 @@ uint8_t FM7_MAINMEM::read_bootrom(uint32_t addr, bool dmamode)
 {
        addr = addr & 0x1ff;
        if(addr <  0x1e0) {
-               iowait();
+
 #if defined(_FM77AV_VARIANTS)
+               if(initiator_enabled) iowait();
                return fm7_bootram[addr];
 #elif defined(_FM77_VARIANTS)
                if(boot_ram_write) {

diff --git a/source/src/vm/fm7/mainmem_writeseq.cpp b/source/src/vm/fm7/mainmem_writeseq.cpp
index 4eca58e..e7f51e3 100644 (file)
--- a/source/src/vm/fm7/mainmem_writeseq.cpp
+++ b/source/src/vm/fm7/mainmem_writeseq.cpp
@@ -137,6 +137,7 @@ void FM7_MAINMEM::write_data(uint32_t addr, uint32_t data, bool dmamode)
 # ifdef _FM77AV_VARIANTS
                        else if(mmr_bank == 0x3f) {
                                if((raddr >= 0xd80) && (raddr <= 0xd97)) { // MMR AREA
+                                       iowait(); // OK?
                                        return;
                                } else {
                                        raddr = raddr | 0x3f000;
@@ -190,11 +191,13 @@ void FM7_MAINMEM::write_data8_main(uint32_t addr, uint32_t data, bool dmamode)
 #ifdef _FM77AV_VARIANTS
        if(initiator_enabled) {
                if((addr >= 0x6000) && (addr < 0x8000)) {
+                       iowait();
                        //uint32_t raddr = addr - 0x6000;
                        //return fm7_mainmen_initrom[raddr];
                        return;
                }
                if((addr >= 0xfffe) && (addr < 0x10000)) {
+                       iowait();
                        //uint32_t raddr = addr - 0xe000;
                        //return fm7_mainmen_initrom[raddr];
                        return;