OSDN Git Service

drm/amdgpu: consistently use AMDGPU_CSA_VADDR
authorChristian König <christian.koenig@amd.com>
Tue, 23 Jan 2018 09:03:46 +0000 (10:03 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 19 Feb 2018 19:18:30 +0000 (14:18 -0500)
Instead of repeating this multiple times.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

index 5a2e4d5..960c35c 100644 (file)
@@ -7132,12 +7132,12 @@ static void gfx_v8_0_ring_emit_ce_meta(struct amdgpu_ring *ring)
        } ce_payload = {};
 
        if (ring->adev->virt.chained_ib_support) {
-               ce_payload_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096 +
-                                                 offsetof(struct vi_gfx_meta_data_chained_ib, ce_payload);
+               ce_payload_addr = AMDGPU_CSA_VADDR +
+                       offsetof(struct vi_gfx_meta_data_chained_ib, ce_payload);
                cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2;
        } else {
-               ce_payload_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096 +
-                                                 offsetof(struct vi_gfx_meta_data, ce_payload);
+               ce_payload_addr = AMDGPU_CSA_VADDR +
+                       offsetof(struct vi_gfx_meta_data, ce_payload);
                cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2;
        }
 
@@ -7160,7 +7160,7 @@ static void gfx_v8_0_ring_emit_de_meta(struct amdgpu_ring *ring)
                struct vi_de_ib_state_chained_ib chained;
        } de_payload = {};
 
-       csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096;
+       csa_addr = AMDGPU_CSA_VADDR;
        gds_addr = csa_addr + 4096;
        if (ring->adev->virt.chained_ib_support) {
                de_payload.chained.gds_backup_addrlo = lower_32_bits(gds_addr);
index cd2b24c..eb09596 100644 (file)
@@ -3865,7 +3865,7 @@ static void gfx_v9_0_ring_emit_ce_meta(struct amdgpu_ring *ring)
        int cnt;
 
        cnt = (sizeof(ce_payload) >> 2) + 4 - 2;
-       csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096;
+       csa_addr = AMDGPU_CSA_VADDR;
 
        amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));
        amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |
@@ -3883,7 +3883,7 @@ static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring)
        uint64_t csa_addr, gds_addr;
        int cnt;
 
-       csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096;
+       csa_addr = AMDGPU_CSA_VADDR;
        gds_addr = csa_addr + 4096;
        de_payload.gds_backup_addrlo = lower_32_bits(gds_addr);
        de_payload.gds_backup_addrhi = upper_32_bits(gds_addr);