dc->hwss.interdependent_update_lock(dc, context, false);
else
dc->hwss.pipe_control_lock(dc, top_pipe_to_program, false);
-
dc->hwss.post_unlock_program_front_end(dc, context);
return;
}
plane_state->flip_immediate);
}
}
+
/* Perform requested Updates */
for (i = 0; i < surface_count; i++) {
struct dc_plane_state *plane_state = srf_updates[i].surface;
dc->hwss.update_plane_addr(dc, pipe_ctx);
}
}
+
}
if ((update_type != UPDATE_TYPE_FAST) && dc->hwss.interdependent_update_lock)
uint32_t (*get_gpint_response)(struct dmub_srv *dmub);
+ uint32_t (*get_current_time)(struct dmub_srv *dmub);
};
/**
boot_options.bits.skip_phy_init_panel_sequence = skip;
REG_WRITE(DMCUB_SCRATCH14, boot_options.all);
}
+
+uint32_t dmub_dcn20_get_current_time(struct dmub_srv *dmub)
+{
+ return REG_READ(DMCUB_TIMER_CURRENT);
+}
DMUB_SR(MMHUBBUB_SOFT_RESET) \
DMUB_SR(DCN_VM_FB_LOCATION_BASE) \
DMUB_SR(DCN_VM_FB_OFFSET) \
- DMUB_SR(DMCUB_INTERRUPT_ACK)
+ DMUB_SR(DMCUB_INTERRUPT_ACK) \
+ DMUB_SR(DMCUB_TIMER_CURRENT)
#define DMUB_COMMON_FIELDS() \
DMUB_SF(DMCUB_CNTL, DMCUB_ENABLE) \
bool dmub_dcn20_use_cached_trace_buffer(struct dmub_srv *dmub);
+uint32_t dmub_dcn20_get_current_time(struct dmub_srv *dmub);
+
#endif /* _DMUB_DCN20_H_ */
funcs->get_fw_status = dmub_dcn20_get_fw_boot_status;
funcs->enable_dmub_boot_options = dmub_dcn20_enable_dmub_boot_options;
funcs->skip_dmub_panel_power_sequence = dmub_dcn20_skip_dmub_panel_power_sequence;
+ funcs->get_current_time = dmub_dcn20_get_current_time;
// Out mailbox register access functions for RN and above
funcs->setup_out_mailbox = dmub_dcn20_setup_out_mailbox;