MIPS32: Properly handle doubles in GetRegisterIfAccessible

There was a problem with floating point registers and exception
handler. In optimizing compiler fpu registers are treated as 64-bit.
This is problematic since logic in GetRegisterIfAccessible doesn't
support 64-bit floating point registers.

This fixes tests:
    510-checker-try-catch
    534-checker-bce-deoptimization

Test: mma test-art-target on CI20 (mips32r2) and emulator (mips32r6)

Change-Id: I0f49c1c30f97077b82ad08fcc3cdb86a4877af23

diff --git a/runtime/stack.cc b/runtime/stack.cc
index 4678ac6..3b5360c 100644 (file)
--- a/runtime/stack.cc
+++ b/runtime/stack.cc
@@ -325,6 +325,14 @@ bool StackVisitor::GetRegisterIfAccessible(uint32_t reg, VRegKind kind, uint32_t
     reg = (kind == kDoubleHiVReg) ? (2 * reg + 1) : (2 * reg);
   }
 
+  // MIPS32 float registers are used as 64-bit (for MIPS32r2 it is pair
+  // F(2n)-F(2n+1), and for MIPS32r6 it is 64-bit register F(2n)). When
+  // accessing upper 32-bits from double, reg + 1 should be used.
+  if ((kRuntimeISA == InstructionSet::kMips) && (kind == kDoubleHiVReg)) {
+    DCHECK_ALIGNED(reg, 2);
+    reg++;
+  }
+
   if (!IsAccessibleRegister(reg, is_float)) {
     return false;
   }

diff --git a/test/Android.run-test.mk b/test/Android.run-test.mk
index 75c4f34..691bcac 100644 (file)
--- a/test/Android.run-test.mk
+++ b/test/Android.run-test.mk
@@ -500,7 +500,6 @@ endif
 
 # Known broken tests for the mips32 optimizing compiler backend.
 TEST_ART_BROKEN_OPTIMIZING_MIPS_RUN_TESTS := \
-    510-checker-try-catch \
 
 ifeq (mips,$(TARGET_ARCH))
   ifneq (,$(filter $(OPTIMIZING_COMPILER_TYPES),$(COMPILER_TYPES)))