drm/amd: Load GFX10 microcode during early_init

Simplifies the code so that GFX10 will get the firmware
name from `amdgpu_ucode_ip_version_decode` and then use this filename
to load microcode as part of the early_init process.

Any failures will cause the driver to fail to probe before the firmware
framebuffer has been removed.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 140bb18..6983acc 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3968,9 +3968,9 @@ static void gfx_v10_0_check_gfxoff_flag(struct amdgpu_device *adev)
 
 static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
 {
-       const char *chip_name;
        char fw_name[40];
-       char *wks = "";
+       char ucode_prefix[30];
+       const char *wks = "";
        int err;
        const struct rlc_firmware_header_v2_0 *rlc_hdr;
        uint16_t version_major;
@@ -3978,71 +3978,31 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
 
        DRM_DEBUG("\n");
 
-       switch (adev->ip_versions[GC_HWIP][0]) {
-       case IP_VERSION(10, 1, 10):
-               chip_name = "navi10";
-               break;
-       case IP_VERSION(10, 1, 1):
-               chip_name = "navi14";
-               if (!(adev->pdev->device == 0x7340 &&
-                     adev->pdev->revision != 0x00))
-                       wks = "_wks";
-               break;
-       case IP_VERSION(10, 1, 2):
-               chip_name = "navi12";
-               break;
-       case IP_VERSION(10, 3, 0):
-               chip_name = "sienna_cichlid";
-               break;
-       case IP_VERSION(10, 3, 2):
-               chip_name = "navy_flounder";
-               break;
-       case IP_VERSION(10, 3, 1):
-               chip_name = "vangogh";
-               break;
-       case IP_VERSION(10, 3, 4):
-               chip_name = "dimgrey_cavefish";
-               break;
-       case IP_VERSION(10, 3, 5):
-               chip_name = "beige_goby";
-               break;
-       case IP_VERSION(10, 3, 3):
-               chip_name = "yellow_carp";
-               break;
-       case IP_VERSION(10, 3, 6):
-               chip_name = "gc_10_3_6";
-               break;
-       case IP_VERSION(10, 1, 3):
-       case IP_VERSION(10, 1, 4):
-               chip_name = "cyan_skillfish2";
-               break;
-       case IP_VERSION(10, 3, 7):
-               chip_name = "gc_10_3_7";
-               break;
-       default:
-               BUG();
-       }
+       if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 1) &&
+          (!(adev->pdev->device == 0x7340 && adev->pdev->revision != 0x00)))
+               wks = "_wks";
+       amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
 
-       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp%s.bin", chip_name, wks);
+       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp%s.bin", ucode_prefix, wks);
        err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw, fw_name);
        if (err)
                goto out;
        amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_PFP);
 
-       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me%s.bin", chip_name, wks);
+       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me%s.bin", ucode_prefix, wks);
        err = amdgpu_ucode_request(adev, &adev->gfx.me_fw, fw_name);
        if (err)
                goto out;
        amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_ME);
 
-       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce%s.bin", chip_name, wks);
+       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce%s.bin", ucode_prefix, wks);
        err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw, fw_name);
        if (err)
                goto out;
        amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_CE);
 
        if (!amdgpu_sriov_vf(adev)) {
-               snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
+               snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", ucode_prefix);
                err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw, fw_name);
                /* don't check this.  There are apparently firmwares in the wild with
                 * incorrect size in the header
@@ -4051,7 +4011,7 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
                        goto out;
                if (err)
                        dev_dbg(adev->dev,
-                               "gfx10: amdgpu_ucode_validate() failed \"%s\"\n",
+                               "gfx10: amdgpu_ucode_request() failed \"%s\"\n",
                                fw_name);
                rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
                version_major = le16_to_cpu(rlc_hdr->header.header_version_major);
@@ -4061,14 +4021,14 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
                        goto out;
        }
 
-       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec%s.bin", chip_name, wks);
+       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec%s.bin", ucode_prefix, wks);
        err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw, fw_name);
        if (err)
                goto out;
        amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1);
        amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1_JT);
 
-       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2%s.bin", chip_name, wks);
+       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2%s.bin", ucode_prefix, wks);
        err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw, fw_name);
        if (!err) {
                amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2);
@@ -4077,6 +4037,8 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
                err = 0;
                adev->gfx.mec2_fw = NULL;
        }
+       amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2);
+       amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2_JT);
 
        gfx_v10_0_check_fw_write_wait(adev);
 out:
@@ -4239,19 +4201,11 @@ static void gfx_v10_0_mec_fini(struct amdgpu_device *adev)
        amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL);
 }
 
-static int gfx_v10_0_me_init(struct amdgpu_device *adev)
+static void gfx_v10_0_me_init(struct amdgpu_device *adev)
 {
-       int r;
-
        bitmap_zero(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES);
 
        amdgpu_gfx_graphics_queue_acquire(adev);
-
-       r = gfx_v10_0_init_microcode(adev);
-       if (r)
-               DRM_ERROR("Failed to load gfx firmware!\n");
-
-       return r;
 }
 
 static int gfx_v10_0_mec_init(struct amdgpu_device *adev)
@@ -4619,9 +4573,7 @@ static int gfx_v10_0_sw_init(void *handle)
 
        adev->gfx.gfx_current_status = AMDGPU_GFX_NORMAL_MODE;
 
-       r = gfx_v10_0_me_init(adev);
-       if (r)
-               return r;
+       gfx_v10_0_me_init(adev);
 
        if (adev->gfx.rlc.funcs) {
                if (adev->gfx.rlc.funcs->init) {
@@ -7599,7 +7551,7 @@ static int gfx_v10_0_early_init(void *handle)
        /* init rlcg reg access ctrl */
        gfx_v10_0_init_rlcg_reg_access_ctrl(adev);
 
-       return 0;
+       return gfx_v10_0_init_microcode(adev);
 }
 
 static int gfx_v10_0_late_init(void *handle)