[x86] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296908 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/conditional-indecrement.ll b/test/CodeGen/X86/conditional-indecrement.ll
index c3e7118..8397c6b 100644 (file)
--- a/test/CodeGen/X86/conditional-indecrement.ll
+++ b/test/CodeGen/X86/conditional-indecrement.ll
@@ -1,89 +1,106 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
 
 define i32 @test1(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: test1:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    sbbl $-1, %esi
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    retq
   %not.cmp = icmp ne i32 %a, 0
   %inc = zext i1 %not.cmp to i32
   %retval.0 = add i32 %inc, %b
   ret i32 %retval.0
-; CHECK-LABEL: test1:
-; CHECK: cmpl $1
-; CHECK: sbbl $-1
-; CHECK: ret
 }
 
 define i32 @test2(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: test2:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    adcl $0, %esi
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    retq
   %cmp = icmp eq i32 %a, 0
   %inc = zext i1 %cmp to i32
   %retval.0 = add i32 %inc, %b
   ret i32 %retval.0
-; CHECK-LABEL: test2:
-; CHECK: cmpl $1
-; CHECK: adcl $0
-; CHECK: ret
 }
 
 define i32 @test3(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: test3:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    adcl $0, %esi
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    retq
   %cmp = icmp eq i32 %a, 0
   %inc = zext i1 %cmp to i32
   %retval.0 = add i32 %inc, %b
   ret i32 %retval.0
-; CHECK-LABEL: test3:
-; CHECK: cmpl $1
-; CHECK: adcl $0
-; CHECK: ret
 }
 
 define i32 @test4(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: test4:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    sbbl $-1, %esi
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    retq
   %not.cmp = icmp ne i32 %a, 0
   %inc = zext i1 %not.cmp to i32
   %retval.0 = add i32 %inc, %b
   ret i32 %retval.0
-; CHECK-LABEL: test4:
-; CHECK: cmpl $1
-; CHECK: sbbl $-1
-; CHECK: ret
 }
 
 define i32 @test5(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: test5:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    adcl $-1, %esi
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    retq
   %not.cmp = icmp ne i32 %a, 0
   %inc = zext i1 %not.cmp to i32
   %retval.0 = sub i32 %b, %inc
   ret i32 %retval.0
-; CHECK-LABEL: test5:
-; CHECK: cmpl $1
-; CHECK: adcl $-1
-; CHECK: ret
 }
 
 define i32 @test6(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: test6:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    sbbl $0, %esi
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    retq
   %cmp = icmp eq i32 %a, 0
   %inc = zext i1 %cmp to i32
   %retval.0 = sub i32 %b, %inc
   ret i32 %retval.0
-; CHECK-LABEL: test6:
-; CHECK: cmpl $1
-; CHECK: sbbl $0
-; CHECK: ret
 }
 
 define i32 @test7(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: test7:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    sbbl $0, %esi
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    retq
   %cmp = icmp eq i32 %a, 0
   %inc = zext i1 %cmp to i32
   %retval.0 = sub i32 %b, %inc
   ret i32 %retval.0
-; CHECK-LABEL: test7:
-; CHECK: cmpl $1
-; CHECK: sbbl $0
-; CHECK: ret
 }
 
 define i32 @test8(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: test8:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    cmpl $1, %edi
+; CHECK-NEXT:    adcl $-1, %esi
+; CHECK-NEXT:    movl %esi, %eax
+; CHECK-NEXT:    retq
   %not.cmp = icmp ne i32 %a, 0
   %inc = zext i1 %not.cmp to i32
   %retval.0 = sub i32 %b, %inc
   ret i32 %retval.0
-; CHECK-LABEL: test8:
-; CHECK: cmpl $1
-; CHECK: adcl $-1
-; CHECK: ret
 }