OSDN Git Service

drm/amdgpu: move adjust adjust_mc_addr into the GFX9 vm_flush functions
authorChristian König <christian.koenig@amd.com>
Fri, 12 May 2017 12:46:23 +0000 (14:46 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 May 2017 22:19:49 +0000 (18:19 -0400)
That GFX9 needs a PDE in the registers is entirely GFX9 specific.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

index 4df5427..3ecde81 100644 (file)
@@ -759,11 +759,10 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job)
                patch_offset = amdgpu_ring_init_cond_exec(ring);
 
        if (ring->funcs->emit_vm_flush && vm_flush_needed) {
-               u64 pd_addr = amdgpu_vm_adjust_mc_addr(adev, job->vm_pd_addr);
                struct dma_fence *fence;
 
-               trace_amdgpu_vm_flush(ring, job->vm_id, pd_addr);
-               amdgpu_ring_emit_vm_flush(ring, job->vm_id, pd_addr);
+               trace_amdgpu_vm_flush(ring, job->vm_id, job->vm_pd_addr);
+               amdgpu_ring_emit_vm_flush(ring, job->vm_id, job->vm_pd_addr);
 
                r = amdgpu_fence_emit(ring, &fence);
                if (r)
index 9c6bd99..e7130cd 100644 (file)
@@ -3771,6 +3771,7 @@ static void gfx_v9_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
        uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
        unsigned eng = ring->vm_inv_eng;
 
+       pd_addr = ring->adev->gart.gart_funcs->adjust_mc_addr(ring->adev, pd_addr);
        pd_addr = pd_addr | 0x1; /* valid bit */
        /* now only use physical base address of PDE and valid */
        BUG_ON(pd_addr & 0xFFFF00000000003EULL);
index 76cb766..332f2fd 100644 (file)
@@ -1143,6 +1143,7 @@ static void sdma_v4_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
        uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
        unsigned eng = ring->vm_inv_eng;
 
+       pd_addr = ring->adev->gart.gart_funcs->adjust_mc_addr(ring->adev, pd_addr);
        pd_addr = pd_addr | 0x1; /* valid bit */
        /* now only use physical base address of PDE and valid */
        BUG_ON(pd_addr & 0xFFFF00000000003EULL);
index aaa3662..74e3f23 100644 (file)
@@ -1316,6 +1316,7 @@ static void uvd_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
        uint32_t data0, data1, mask;
        unsigned eng = ring->vm_inv_eng;
 
+       pd_addr = ring->adev->gart.gart_funcs->adjust_mc_addr(ring->adev, pd_addr);
        pd_addr = pd_addr | 0x1; /* valid bit */
        /* now only use physical base address of PDE and valid */
        BUG_ON(pd_addr & 0xFFFF00000000003EULL);
@@ -1357,6 +1358,7 @@ static void uvd_v7_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
        uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
        unsigned eng = ring->vm_inv_eng;
 
+       pd_addr = ring->adev->gart.gart_funcs->adjust_mc_addr(ring->adev, pd_addr);
        pd_addr = pd_addr | 0x1; /* valid bit */
        /* now only use physical base address of PDE and valid */
        BUG_ON(pd_addr & 0xFFFF00000000003EULL);
index 77f1b60..0012835 100644 (file)
@@ -926,6 +926,7 @@ static void vce_v4_0_emit_vm_flush(struct amdgpu_ring *ring,
        uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
        unsigned eng = ring->vm_inv_eng;
 
+       pd_addr = ring->adev->gart.gart_funcs->adjust_mc_addr(ring->adev, pd_addr);
        pd_addr = pd_addr | 0x1; /* valid bit */
        /* now only use physical base address of PDE and valid */
        BUG_ON(pd_addr & 0xFFFF00000000003EULL);