OSDN Git Service

mt76: mt7915: update mac timing settings
authorRyder Lee <ryder.lee@mediatek.com>
Mon, 16 Aug 2021 00:32:26 +0000 (08:32 +0800)
committerFelix Fietkau <nbd@nbd.name>
Wed, 20 Oct 2021 08:36:35 +0000 (10:36 +0200)
1. EIFS has been divided into OFDM/CCK fields after 11ax generation.
2. For 5G/6G SIFS setting, hardware counts extra 6us for OFDM.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
drivers/net/wireless/mediatek/mt76/mt7915/mac.c
drivers/net/wireless/mediatek/mt76/mt7915/regs.h

index dfc5ea2..5439fa7 100644 (file)
@@ -1572,17 +1572,12 @@ void mt7915_mac_set_timing(struct mt7915_phy *phy)
                  FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);
        u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |
                   FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28);
-       int sifs, offset;
+       int offset;
        bool is_5ghz = phy->mt76->chandef.chan->band == NL80211_BAND_5GHZ;
 
        if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state))
                return;
 
-       if (is_5ghz)
-               sifs = 16;
-       else
-               sifs = 10;
-
        if (ext_phy) {
                coverage_class = max_t(s16, dev->phy.coverage_class,
                                       coverage_class);
@@ -1604,11 +1599,14 @@ void mt7915_mac_set_timing(struct mt7915_phy *phy)
        mt76_wr(dev, MT_TMAC_CDTR(ext_phy), cck + reg_offset);
        mt76_wr(dev, MT_TMAC_ODTR(ext_phy), ofdm + reg_offset);
        mt76_wr(dev, MT_TMAC_ICR0(ext_phy),
-               FIELD_PREP(MT_IFS_EIFS, 360) |
+               FIELD_PREP(MT_IFS_EIFS_OFDM, is_5ghz ? 84 : 78) |
                FIELD_PREP(MT_IFS_RIFS, 2) |
-               FIELD_PREP(MT_IFS_SIFS, sifs) |
+               FIELD_PREP(MT_IFS_SIFS, 10) |
                FIELD_PREP(MT_IFS_SLOT, phy->slottime));
 
+       mt76_wr(dev, MT_TMAC_ICR1(ext_phy),
+               FIELD_PREP(MT_IFS_EIFS_CCK, 314));
+
        if (phy->slottime < 20 || is_5ghz)
                val = MT7915_CFEND_RATE_DEFAULT;
        else
index a213b5c..91c1fb5 100644 (file)
 #define MT_TMAC_TRCR0_I2T_CHK          GENMASK(24, 16)
 
 #define MT_TMAC_ICR0(_band)            MT_WF_TMAC(_band, 0x0a4)
-#define MT_IFS_EIFS                    GENMASK(8, 0)
+#define MT_IFS_EIFS_OFDM                       GENMASK(8, 0)
 #define MT_IFS_RIFS                    GENMASK(14, 10)
 #define MT_IFS_SIFS                    GENMASK(22, 16)
 #define MT_IFS_SLOT                    GENMASK(30, 24)
 
+#define MT_TMAC_ICR1(_band)            MT_WF_TMAC(_band, 0x0b4)
+#define MT_IFS_EIFS_CCK                        GENMASK(8, 0)
+
 #define MT_TMAC_CTCR0(_band)                   MT_WF_TMAC(_band, 0x0f4)
 #define MT_TMAC_CTCR0_INS_DDLMT_REFTIME                GENMASK(5, 0)
 #define MT_TMAC_CTCR0_INS_DDLMT_EN             BIT(17)