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drm/msm/dsi: stop setting clock parents manually
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 6 Oct 2021 20:48:28 +0000 (23:48 +0300)
committerRob Clark <robdclark@chromium.org>
Sun, 28 Nov 2021 17:32:03 +0000 (09:32 -0800)
There is no reason to set clock parents manually, use device tree to
assign DSI/display clock parents to DSI PHY clocks. Dropping this manual
setup allows us to drop repeating code and to move registration of hw
clock providers to generic place.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20211006204828.1218225-2-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/dsi/dsi.h
drivers/gpu/drm/msm/dsi/dsi_host.c
drivers/gpu/drm/msm/dsi/dsi_manager.c
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c

index 79a2d22..66443dc 100644 (file)
@@ -175,8 +175,6 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy,
 void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
 void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
                             enum msm_dsi_phy_usecase uc);
-int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
-       struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
 void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy);
 int msm_dsi_phy_pll_restore_state(struct msm_dsi_phy *phy);
 void msm_dsi_phy_snapshot(struct msm_disp_state *disp_state, struct msm_dsi_phy *phy);
index a4ba973..971a418 100644 (file)
@@ -2195,57 +2195,6 @@ void msm_dsi_host_set_phy_mode(struct mipi_dsi_host *host,
        msm_host->cphy_mode = src_phy->cphy_mode;
 }
 
-int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
-       struct msm_dsi_phy *src_phy)
-{
-       struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
-       struct clk *byte_clk_provider, *pixel_clk_provider;
-       int ret;
-
-       ret = msm_dsi_phy_get_clk_provider(src_phy,
-                               &byte_clk_provider, &pixel_clk_provider);
-       if (ret) {
-               pr_info("%s: can't get provider from pll, don't set parent\n",
-                       __func__);
-               return 0;
-       }
-
-       ret = clk_set_parent(msm_host->byte_clk_src, byte_clk_provider);
-       if (ret) {
-               pr_err("%s: can't set parent to byte_clk_src. ret=%d\n",
-                       __func__, ret);
-               goto exit;
-       }
-
-       ret = clk_set_parent(msm_host->pixel_clk_src, pixel_clk_provider);
-       if (ret) {
-               pr_err("%s: can't set parent to pixel_clk_src. ret=%d\n",
-                       __func__, ret);
-               goto exit;
-       }
-
-       if (msm_host->dsi_clk_src) {
-               ret = clk_set_parent(msm_host->dsi_clk_src, pixel_clk_provider);
-               if (ret) {
-                       pr_err("%s: can't set parent to dsi_clk_src. ret=%d\n",
-                               __func__, ret);
-                       goto exit;
-               }
-       }
-
-       if (msm_host->esc_clk_src) {
-               ret = clk_set_parent(msm_host->esc_clk_src, byte_clk_provider);
-               if (ret) {
-                       pr_err("%s: can't set parent to esc_clk_src. ret=%d\n",
-                               __func__, ret);
-                       goto exit;
-               }
-       }
-
-exit:
-       return ret;
-}
-
 void msm_dsi_host_reset_phy(struct mipi_dsi_host *host)
 {
        struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
index 6a18287..a152dbf 100644 (file)
@@ -80,10 +80,7 @@ static int dsi_mgr_setup_components(int id)
 
                msm_dsi_phy_set_usecase(msm_dsi->phy, MSM_DSI_PHY_STANDALONE);
                msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
-               ret = msm_dsi_host_set_src_pll(msm_dsi->host, msm_dsi->phy);
-       } else if (!other_dsi) {
-               ret = 0;
-       } else {
+       } else if (other_dsi) {
                struct msm_dsi *master_link_dsi = IS_MASTER_DSI_LINK(id) ?
                                                        msm_dsi : other_dsi;
                struct msm_dsi *slave_link_dsi = IS_MASTER_DSI_LINK(id) ?
@@ -109,13 +106,9 @@ static int dsi_mgr_setup_components(int id)
                                        MSM_DSI_PHY_SLAVE);
                msm_dsi_host_set_phy_mode(msm_dsi->host, msm_dsi->phy);
                msm_dsi_host_set_phy_mode(other_dsi->host, other_dsi->phy);
-               ret = msm_dsi_host_set_src_pll(msm_dsi->host, clk_master_dsi->phy);
-               if (ret)
-                       return ret;
-               ret = msm_dsi_host_set_src_pll(other_dsi->host, clk_master_dsi->phy);
        }
 
-       return ret;
+       return 0;
 }
 
 static int enable_phy(struct msm_dsi *msm_dsi,
index 9842e04..0b2ae5c 100644 (file)
@@ -892,17 +892,6 @@ bool msm_dsi_phy_set_continuous_clock(struct msm_dsi_phy *phy, bool enable)
        return phy->cfg->ops.set_continuous_clock(phy, enable);
 }
 
-int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
-       struct clk **byte_clk_provider, struct clk **pixel_clk_provider)
-{
-       if (byte_clk_provider)
-               *byte_clk_provider = phy->provided_clocks->hws[DSI_BYTE_PLL_CLK]->clk;
-       if (pixel_clk_provider)
-               *pixel_clk_provider = phy->provided_clocks->hws[DSI_PIXEL_PLL_CLK]->clk;
-
-       return 0;
-}
-
 void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy)
 {
        if (phy->cfg->ops.save_pll_state) {