icount = 0;
int_state = 0;
extra_icount = 0;
-
+ busreq = false;
+
DPD = 0; /* Reset direct page register */
CC = 0;
D = 0;
{
if ((int_state & MC6809_HALT_BIT) != 0) { // 0x80
- icount = 0;
- extra_icount = 0;
+ if(icount > 0) icount -= 8; // OK?
+ if(!busreq) write_signals(&outputs_bus_halt, 0xffffffff);
+ busreq = true;
return;
- } else
+ }
+ if(busreq) write_signals(&outputs_bus_halt, 0x00000000);
+ busreq = false;
if(int_state & MC6809_NMI_BIT) {
int_state &= ~MC6809_NMI_BIT;
int_state &= ~MC6809_SYNC_IN; /* clear SYNC flag */
private:
// context
DEVICE *d_mem;
+ outputs_t outputs_bus_halt; // For sync
// registers
pair pc; /* Program counter */
pair ea; /* effective address */
uint8 int_state;
+ bool busreq;
int icount;
int extra_icount;
inline uint32 RM16(uint32 Addr);
public:
- MC6809(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu) {}
+ MC6809(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu)
+ {
+ init_output_signals(&outputs_bus_halt);
+ }
~MC6809() {}
// common functions
{
d_mem = device;
}
+ void set_context_bus_halt(DEVICE* device, int id, uint32 mask)
+ {
+ register_output_signal(&outputs_bus_halt, device, id, mask);
+ }
};
#endif