Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
case TILEGX_EXCP_REG_UDN_ACCESS:
gen_sigill_reg(env);
break;
+ case TILEGX_EXCP_SEGV:
+ gen_sigsegv_maperr(env, env->excaddr);
+ break;
default:
fprintf(stderr, "trapnr is %d[0x%x].\n", trapnr, trapnr);
g_assert_not_reached();
static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
int mmu_idx)
{
- cpu_dump_state(cs, stderr, fprintf, 0);
+ TileGXCPU *cpu = TILEGX_CPU(cs);
+
+ cs->exception_index = TILEGX_EXCP_SEGV;
+ cpu->env.excaddr = address;
return 1;
}
typedef enum {
TILEGX_EXCP_NONE = 0,
TILEGX_EXCP_SYSCALL = 1,
+ TILEGX_EXCP_SEGV = 2,
TILEGX_EXCP_OPCODE_UNKNOWN = 0x101,
TILEGX_EXCP_OPCODE_UNIMPLEMENTED = 0x102,
TILEGX_EXCP_OPCODE_CMPEXCH = 0x103,
#if defined(CONFIG_USER_ONLY)
uint32_t excparam; /* exception parameter */
+ uint64_t excaddr; /* exception address */
#endif
CPU_COMMON