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drm/amdgpu: fix the indexing issue during rlcg access ctrl init
authorShiwu Zhang <shiwu.zhang@amd.com>
Thu, 20 Jul 2023 07:25:15 +0000 (15:25 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 25 Jul 2023 17:47:26 +0000 (13:47 -0400)
In case that the GET_INST() is used for looping, only loops for the
times of actual num of xcc, otherwise GET_INST() will return the invalid
index, a.k.a -1

And also remove the redundant mask checking in case of GET_INST()

Signed-off-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

index 9053435..86a84a0 100644 (file)
@@ -1075,12 +1075,11 @@ static void gfx_v9_4_3_xcc_unset_safe_mode(struct amdgpu_device *adev,
 
 static void gfx_v9_4_3_init_rlcg_reg_access_ctrl(struct amdgpu_device *adev)
 {
-       int xcc_id;
+       int xcc_id, num_xcc;
        struct amdgpu_rlcg_reg_access_ctrl *reg_access_ctrl;
 
-       for (xcc_id = 0; xcc_id < AMDGPU_MAX_RLC_INSTANCES; xcc_id++) {
-               if (((1 << xcc_id) & adev->gfx.xcc_mask) == 0)
-                       continue;
+       num_xcc = NUM_XCC(adev->gfx.xcc_mask);
+       for (xcc_id = 0; xcc_id < num_xcc; xcc_id++) {
                reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[GET_INST(GC, xcc_id)];
                reg_access_ctrl->scratch_reg0 = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regSCRATCH_REG0);
                reg_access_ctrl->scratch_reg1 = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regSCRATCH_REG1);