drm/amd/display: Add p-state debugging

[WHY]
P-State related issues are fairly common but currently
there is no way to debug these issues after the fact.

[HOW]
Add helpful registers to HW state queries

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Sung Lee <sunglee@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c
index 24bd932..0ddd310 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c
@@ -623,6 +623,11 @@ void hubbub2_read_state(struct hubbub *hubbub, struct dcn_hubbub_state *hubbub_s
                 REG_GET(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_VMID, &hubbub_state->vm_error_vmid);
                 REG_GET(DCN_VM_FAULT_STATUS, DCN_VM_ERROR_PIPE, &hubbub_state->vm_error_pipe);
        }
+
+       if (REG(DCHUBBUB_TEST_DEBUG_INDEX) && REG(DCHUBBUB_TEST_DEBUG_DATA)) {
+               REG_WRITE(DCHUBBUB_TEST_DEBUG_INDEX, 0x6);
+               hubbub_state->test_debug_data = REG_READ(DCHUBBUB_TEST_DEBUG_DATA);
+       }
 }
 
 static const struct hubbub_funcs hubbub2_funcs = {

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
index beb26dc..aa80b3f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
@@ -111,6 +111,7 @@ struct dcn_hubbub_state {
        uint32_t vm_error_vmid;
        uint32_t vm_error_pipe;
        uint32_t vm_error_mode;
+       uint32_t test_debug_data;
 };
 
 struct hubbub_funcs {

diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
index d35432c..7c9a2b3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
+++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
@@ -271,7 +271,7 @@ struct dmub_srv_hw_params {
  */
 struct dmub_diagnostic_data {
        uint32_t dmcub_version;
-       uint32_t scratch[16];
+       uint32_t scratch[17];
        uint32_t pc;
        uint32_t undefined_address_fault_addr;
        uint32_t inst_fetch_fault_addr;
@@ -282,6 +282,7 @@ struct dmub_diagnostic_data {
        uint32_t inbox0_rptr;
        uint32_t inbox0_wptr;
        uint32_t inbox0_size;
+       uint32_t gpint_datain0;
        uint8_t is_dmcub_enabled : 1;
        uint8_t is_dmcub_soft_reset : 1;
        uint8_t is_dmcub_secure_reset : 1;

diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
index 21dd6cb..bf5994e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.c
@@ -439,6 +439,7 @@ void dmub_dcn32_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnosti
        diag_data->scratch[13] = REG_READ(DMCUB_SCRATCH13);
        diag_data->scratch[14] = REG_READ(DMCUB_SCRATCH14);
        diag_data->scratch[15] = REG_READ(DMCUB_SCRATCH15);
+       diag_data->scratch[16] = REG_READ(DMCUB_SCRATCH16);
 
        diag_data->undefined_address_fault_addr = REG_READ(DMCUB_UNDEFINED_ADDRESS_FAULT_ADDR);
        diag_data->inst_fetch_fault_addr = REG_READ(DMCUB_INST_FETCH_FAULT_ADDR);
@@ -469,6 +470,8 @@ void dmub_dcn32_get_diagnostic_data(struct dmub_srv *dmub, struct dmub_diagnosti
 
        REG_GET(DMCUB_REGION3_CW6_TOP_ADDRESS, DMCUB_REGION3_CW6_ENABLE, &is_cw6_enabled);
        diag_data->is_cw6_enabled = is_cw6_enabled;
+
+       diag_data->gpint_datain0 = REG_READ(DMCUB_GPINT_DATAIN0);
 }
 void dmub_dcn32_configure_dmub_in_system_memory(struct dmub_srv *dmub)
 {

diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h
index f15336b..d58a1e4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn32.h
@@ -107,6 +107,7 @@ struct dmub_srv;
        DMUB_SR(DMCUB_SCRATCH15) \
        DMUB_SR(DMCUB_SCRATCH16) \
        DMUB_SR(DMCUB_SCRATCH17) \
+       DMUB_SR(DMCUB_GPINT_DATAIN0) \
        DMUB_SR(DMCUB_GPINT_DATAIN1) \
        DMUB_SR(DMCUB_GPINT_DATAOUT) \
        DMUB_SR(CC_DC_PIPE_DIS) \