man->use_tt = true;
man->func = &amdgpu_gtt_mgr_func;
- man->available_caching = TTM_PL_MASK_CACHING;
ttm_resource_manager_init(man, gtt_size >> PAGE_SHIFT);
uint64_t size)
{
return ttm_range_man_init(&adev->mman.bdev, type,
- TTM_PL_FLAG_UNCACHED,
false, size >> PAGE_SHIFT);
}
struct ttm_resource_manager *man = &mgr->manager;
int ret;
- man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
-
ttm_resource_manager_init(man, adev->gmc.real_vram_size >> PAGE_SHIFT);
man->func = &amdgpu_vram_mgr_func;
return ret;
ret = ttm_range_man_init(&vmm->bdev, TTM_PL_VRAM,
- TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC,
false, vram_size >> PAGE_SHIFT);
if (ret)
return ret;
if (!man)
return -ENOMEM;
- man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
man->func = &nouveau_vram_manager;
ttm_resource_manager_init(man,
ttm_resource_manager_set_used(man, true);
return 0;
} else {
- return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_VRAM,
- TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC,
- false,
+ return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_VRAM, false,
drm->gem.vram_available >> PAGE_SHIFT);
}
}
else if (!drm->agp.bridge)
func = &nv04_gart_manager;
else
- return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_TT,
- TTM_PL_MASK_CACHING, true,
+ return ttm_range_man_init(&drm->ttm.bdev, TTM_PL_TT, true,
size_pages);
man = kzalloc(sizeof(*man), GFP_KERNEL);
return -ENOMEM;
man->func = func;
- man->available_caching = TTM_PL_MASK_CACHING;
man->use_tt = true;
ttm_resource_manager_init(man, size_pages);
ttm_set_driver_manager(&drm->ttm.bdev, TTM_PL_TT, man);
unsigned int type,
uint64_t size)
{
- return ttm_range_man_init(&qdev->mman.bdev, type, TTM_PL_MASK_CACHING,
- false, size);
+ return ttm_range_man_init(&qdev->mman.bdev, type, false, size);
}
int qxl_ttm_init(struct qxl_device *qdev)
static int radeon_ttm_init_vram(struct radeon_device *rdev)
{
return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
- TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC,
false, rdev->mc.real_vram_size >> PAGE_SHIFT);
}
static int radeon_ttm_init_gtt(struct radeon_device *rdev)
{
return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
- TTM_PL_MASK_CACHING,
true, rdev->mc.gtt_size >> PAGE_SHIFT);
}
if (!man || !ttm_resource_manager_used(man))
return -EBUSY;
- if ((place->flags & man->available_caching) == 0)
- return -EBUSY;
-
- cur_flags = place->flags & man->available_caching;
- cur_flags = ttm_bo_select_caching(man, bo->mem.placement, cur_flags);
+ cur_flags = ttm_bo_select_caching(man, bo->mem.placement,
+ place->flags);
cur_flags |= place->flags & ~TTM_PL_MASK_CACHING;
mem->mem_type = place->mem_type;
* Other types need to be driver / IOCTL initialized.
*/
man->use_tt = true;
- man->available_caching = TTM_PL_MASK_CACHING;
ttm_resource_manager_init(man, 0);
ttm_set_driver_manager(bdev, TTM_PL_SYSTEM, man);
static const struct ttm_resource_manager_func ttm_range_manager_func;
int ttm_range_man_init(struct ttm_bo_device *bdev,
- unsigned type,
- uint32_t available_caching,
- bool use_tt,
+ unsigned type, bool use_tt,
unsigned long p_size)
{
struct ttm_resource_manager *man;
return -ENOMEM;
man = &rman->manager;
- man->available_caching = available_caching;
man->use_tt = use_tt;
man->func = &ttm_range_manager_func;
drm_printf(p, " use_type: %d\n", man->use_type);
drm_printf(p, " use_tt: %d\n", man->use_tt);
drm_printf(p, " size: %llu\n", man->size);
- drm_printf(p, " available_caching: 0x%08X\n", man->available_caching);
if (man->func && man->func->debug)
(*man->func->debug)(man, p);
}
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
ret = vmw_thp_init(dev_priv);
#else
- ret = ttm_range_man_init(&dev_priv->bdev, TTM_PL_VRAM,
- TTM_PL_FLAG_CACHED, false,
+ ret = ttm_range_man_init(&dev_priv->bdev, TTM_PL_VRAM, false,
dev_priv->vram_size >> PAGE_SHIFT);
#endif
ttm_resource_manager_set_used(ttm_manager_type(&dev_priv->bdev, TTM_PL_VRAM), false);
DRM_ERROR("Failed initializing TTM buffer object driver.\n");
goto out_no_bdev;
}
- ttm_manager_type(&dev_priv->bdev, TTM_PL_SYSTEM)->available_caching =
- TTM_PL_FLAG_CACHED;
/*
* Enable VRAM, but initially don't use it until SVGA is enabled and
man = &gman->manager;
man->func = &vmw_gmrid_manager_func;
- man->available_caching = TTM_PL_FLAG_CACHED;
/* TODO: This is most likely not correct */
man->use_tt = true;
ttm_resource_manager_init(man, 0);
int vmw_thp_init(struct vmw_private *dev_priv)
{
- struct ttm_resource_manager *man;
struct vmw_thp_manager *rman;
rman = kzalloc(sizeof(*rman), GFP_KERNEL);
if (!rman)
return -ENOMEM;
- man = &rman->manager;
- man->available_caching = TTM_PL_FLAG_CACHED;
-
- ttm_resource_manager_init(man,
+ ttm_resource_manager_init(&rman->manager,
dev_priv->vram_size >> PAGE_SHIFT);
- drm_mm_init(&rman->mm, 0, man->size);
+ drm_mm_init(&rman->mm, 0, rman->manager.size);
spin_lock_init(&rman->lock);
ttm_set_driver_manager(&dev_priv->bdev, TTM_PL_VRAM, &rman->manager);
- ttm_resource_manager_set_used(man, true);
+ ttm_resource_manager_set_used(&rman->manager, true);
return 0;
}
*
* @bdev: ttm device
* @type: memory manager type
- * @available_caching: TTM_PL_FLAG_* for allowed caching modes
* @use_tt: if the memory manager uses tt
* @p_size: size of area to be managed in pages.
*
* The range manager is installed for this device in the type slot.
*/
int ttm_range_man_init(struct ttm_bo_device *bdev,
- unsigned type,
- uint32_t available_caching,
- bool use_tt,
+ unsigned type, bool use_tt,
unsigned long p_size);
/**
* @gpu_offset: If used, the GPU offset of the first managed page of
* fixed memory or the first managed location in an aperture.
* @size: Size of the managed region.
- * @available_caching: A mask of available caching types, TTM_PL_FLAG_XX,
- * as defined in ttm_placement_common.h
* @func: structure pointer implementing the range manager. See above
* @move_lock: lock for move fence
* static information. bdev::driver::io_mem_free is never used.
bool use_type;
bool use_tt;
uint64_t size;
- uint32_t available_caching;
const struct ttm_resource_manager_func *func;
spinlock_t move_lock;