i965: Change INTEL_DEBUG=vec4 to INTEL_SCALAR_VS for consistency.

We moved to INTEL_SCALAR_* when we added more than a single stage, but
never went back and converted the VS to work that way.  Be consistent.

Also update the documentation to actually mention these debug variables.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>

diff --git a/docs/envvars.html b/docs/envvars.html
index a970a66..9e2f816 100644 (file)
--- a/docs/envvars.html
+++ b/docs/envvars.html
@@ -200,10 +200,10 @@ See the <a href="xlibdriver.html">Xlib software driver page</a> for details.
    <li>tes - dump shader assembly for tessellation evaluation shaders</li>
    <li>tex - emit messages about textures.</li>
    <li>urb - emit messages about URB setup</li>
-   <li>vec4 - force vec4 mode in vertex shader</li>
    <li>vert - emit messages about vertex assembly</li>
    <li>vs - dump shader assembly for vertex shaders</li>
 </ul>
+<li>INTEL_SCALAR_VS (or TCS, TES, GS) - force scalar/vec4 mode for a shader stage (Gen8-9 only)</li>
 <li>INTEL_PRECISE_TRIG - if set to 1, true or yes, then the driver prefers
    accuracy over performance in trig functions.</li>
 </ul>

diff --git a/src/intel/common/gen_debug.c b/src/intel/common/gen_debug.c
index f5702f0..b604d56 100644 (file)
--- a/src/intel/common/gen_debug.c
+++ b/src/intel/common/gen_debug.c
@@ -68,7 +68,6 @@ static const struct debug_control debug_control[] = {
    { "optimizer",   DEBUG_OPTIMIZER },
    { "ann",         DEBUG_ANNOTATION },
    { "no8",         DEBUG_NO8 },
-   { "vec4",        DEBUG_VEC4VS },
    { "spill_fs",    DEBUG_SPILL_FS },
    { "spill_vec4",  DEBUG_SPILL_VEC4 },
    { "cs",          DEBUG_CS },

diff --git a/src/intel/common/gen_debug.h b/src/intel/common/gen_debug.h
index f7f59c9..d290303 100644 (file)
--- a/src/intel/common/gen_debug.h
+++ b/src/intel/common/gen_debug.h
@@ -69,7 +69,7 @@ extern uint64_t INTEL_DEBUG;
 #define DEBUG_OPTIMIZER           (1ull << 25)
 #define DEBUG_ANNOTATION          (1ull << 26)
 #define DEBUG_NO8                 (1ull << 27)
-#define DEBUG_VEC4VS              (1ull << 28)
+/* Hole - feel free to reuse      (1ull << 28) */
 #define DEBUG_SPILL_FS            (1ull << 29)
 #define DEBUG_SPILL_VEC4          (1ull << 30)
 #define DEBUG_CS                  (1ull << 31)

diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c
index aa896b9..f31f29d 100644 (file)
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -118,7 +118,7 @@ brw_compiler_create(void *mem_ctx, const struct gen_device_info *devinfo)
          compiler->scalar_stage[i] = true;
    } else {
       compiler->scalar_stage[MESA_SHADER_VERTEX] =
-         devinfo->gen >= 8 && !(INTEL_DEBUG & DEBUG_VEC4VS);
+         devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_VS", true);
       compiler->scalar_stage[MESA_SHADER_TESS_CTRL] =
          devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_TCS", true);
       compiler->scalar_stage[MESA_SHADER_TESS_EVAL] =