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net: stmmac: Add dwmac-intel-plat for GBE driver
authorRusaimi Amira Ruslan <rusaimi.amira.rusaimi@intel.com>
Wed, 26 Aug 2020 04:33:42 +0000 (12:33 +0800)
committerDavid S. Miller <davem@davemloft.net>
Wed, 26 Aug 2020 22:52:30 +0000 (15:52 -0700)
Add dwmac-intel-plat to enable the stmmac driver in Intel Keem Bay.
Also add fix_mac_speed and tx_clk in order to change link speeds.
This is required as mac_speed_o is not connected in the
Intel Keem Bay SoC.

Signed-off-by: Rusaimi Amira Ruslan <rusaimi.amira.rusaimi@intel.com>
Signed-off-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/Kconfig
drivers/net/ethernet/stmicro/stmmac/Makefile
drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c [new file with mode: 0644]

index 9a47c5a..7572cea 100644 (file)
@@ -209,6 +209,16 @@ config DWMAC_IMX8
          device driver. This driver is used for i.MX8 series like
          iMX8MP/iMX8DXL GMAC ethernet controller.
 
+config DWMAC_INTEL_PLAT
+       tristate "Intel dwmac support"
+       depends on OF && COMMON_CLK
+       depends on STMMAC_ETH
+       help
+         Support for ethernet controllers on Intel SoCs
+
+         This selects the Intel platform specific glue layer support for
+         the stmmac device driver. This driver is used for the Intel Keem Bay
+         SoC.
 endif
 
 config DWMAC_INTEL
index 295615a..24e6145 100644 (file)
@@ -26,6 +26,7 @@ obj-$(CONFIG_DWMAC_STM32)     += dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)      += dwmac-sunxi.o
 obj-$(CONFIG_DWMAC_SUN8I)      += dwmac-sun8i.o
 obj-$(CONFIG_DWMAC_DWC_QOS_ETH)        += dwmac-dwc-qos-eth.o
+obj-$(CONFIG_DWMAC_INTEL_PLAT) += dwmac-intel-plat.o
 obj-$(CONFIG_DWMAC_GENERIC)    += dwmac-generic.o
 obj-$(CONFIG_DWMAC_IMX8)       += dwmac-imx.o
 stmmac-platform-objs:= stmmac_platform.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c
new file mode 100644 (file)
index 0000000..ccac7bf
--- /dev/null
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Intel DWMAC platform driver
+ *
+ * Copyright(C) 2020 Intel Corporation
+ */
+
+#include <linux/ethtool.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/stmmac.h>
+
+#include "stmmac.h"
+#include "stmmac_platform.h"
+
+struct intel_dwmac {
+       struct device *dev;
+       struct clk *tx_clk;
+       const struct intel_dwmac_data *data;
+};
+
+struct intel_dwmac_data {
+       void (*fix_mac_speed)(void *priv, unsigned int speed);
+       unsigned long ptp_ref_clk_rate;
+       unsigned long tx_clk_rate;
+       bool tx_clk_en;
+};
+
+static void kmb_eth_fix_mac_speed(void *priv, unsigned int speed)
+{
+       struct intel_dwmac *dwmac = priv;
+       unsigned long rate;
+       int ret;
+
+       rate = clk_get_rate(dwmac->tx_clk);
+
+       switch (speed) {
+       case SPEED_1000:
+               rate = 125000000;
+               break;
+
+       case SPEED_100:
+               rate = 25000000;
+               break;
+
+       case SPEED_10:
+               rate = 2500000;
+               break;
+
+       default:
+               dev_err(dwmac->dev, "Invalid speed\n");
+               break;
+       }
+
+       ret = clk_set_rate(dwmac->tx_clk, rate);
+       if (ret)
+               dev_err(dwmac->dev, "Failed to configure tx clock rate\n");
+}
+
+static const struct intel_dwmac_data kmb_data = {
+       .fix_mac_speed = kmb_eth_fix_mac_speed,
+       .ptp_ref_clk_rate = 200000000,
+       .tx_clk_rate = 125000000,
+       .tx_clk_en = true,
+};
+
+static const struct of_device_id intel_eth_plat_match[] = {
+       { .compatible = "intel,keembay-dwmac", .data = &kmb_data },
+       { }
+};
+MODULE_DEVICE_TABLE(of, intel_eth_plat_match);
+
+static int intel_eth_plat_probe(struct platform_device *pdev)
+{
+       struct net_device *ndev = platform_get_drvdata(pdev);
+       struct stmmac_priv *priv = netdev_priv(ndev);
+       struct plat_stmmacenet_data *plat_dat;
+       struct stmmac_resources stmmac_res;
+       const struct of_device_id *match;
+       struct intel_dwmac *dwmac;
+       unsigned long rate;
+       int ret;
+
+       plat_dat = priv->plat;
+       ret = stmmac_get_platform_resources(pdev, &stmmac_res);
+       if (ret)
+               return ret;
+
+       plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
+       if (IS_ERR(plat_dat)) {
+               dev_err(&pdev->dev, "dt configuration failed\n");
+               return PTR_ERR(plat_dat);
+       }
+
+       dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
+       if (!dwmac) {
+               ret = -ENOMEM;
+               goto err_remove_config_dt;
+       }
+
+       dwmac->dev = &pdev->dev;
+       dwmac->tx_clk = NULL;
+
+       match = of_match_device(intel_eth_plat_match, &pdev->dev);
+       if (match && match->data) {
+               dwmac->data = (const struct intel_dwmac_data *)match->data;
+
+               if (dwmac->data->fix_mac_speed)
+                       plat_dat->fix_mac_speed = dwmac->data->fix_mac_speed;
+
+               /* Enable TX clock */
+               if (dwmac->data->tx_clk_en) {
+                       dwmac->tx_clk = devm_clk_get(&pdev->dev, "tx_clk");
+                       if (IS_ERR(dwmac->tx_clk))
+                               goto err_remove_config_dt;
+
+                       clk_prepare_enable(dwmac->tx_clk);
+
+                       /* Check and configure TX clock rate */
+                       rate = clk_get_rate(dwmac->tx_clk);
+                       if (dwmac->data->tx_clk_rate &&
+                           rate != dwmac->data->tx_clk_rate) {
+                               rate = dwmac->data->tx_clk_rate;
+                               ret = clk_set_rate(dwmac->tx_clk, rate);
+                               if (ret) {
+                                       dev_err(&pdev->dev,
+                                               "Failed to set tx_clk\n");
+                                       return ret;
+                               }
+                       }
+               }
+
+               /* Check and configure PTP ref clock rate */
+               rate = clk_get_rate(plat_dat->clk_ptp_ref);
+               if (dwmac->data->ptp_ref_clk_rate &&
+                   rate != dwmac->data->ptp_ref_clk_rate) {
+                       rate = dwmac->data->ptp_ref_clk_rate;
+                       ret = clk_set_rate(plat_dat->clk_ptp_ref, rate);
+                       if (ret) {
+                               dev_err(&pdev->dev,
+                                       "Failed to set clk_ptp_ref\n");
+                               return ret;
+                       }
+               }
+       }
+
+       plat_dat->bsp_priv = dwmac;
+
+       ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+       if (ret) {
+               if (dwmac->tx_clk)
+                       clk_disable_unprepare(dwmac->tx_clk);
+
+               goto err_remove_config_dt;
+       }
+
+       return 0;
+
+err_remove_config_dt:
+       stmmac_remove_config_dt(pdev, plat_dat);
+
+       return ret;
+}
+
+static int intel_eth_plat_remove(struct platform_device *pdev)
+{
+       struct intel_dwmac *dwmac = get_stmmac_bsp_priv(&pdev->dev);
+       int ret;
+
+       ret = stmmac_pltfr_remove(pdev);
+
+       if (dwmac->tx_clk)
+               clk_disable_unprepare(dwmac->tx_clk);
+
+       return ret;
+}
+
+static struct platform_driver intel_eth_plat_driver = {
+       .probe  = intel_eth_plat_probe,
+       .remove = intel_eth_plat_remove,
+       .driver = {
+               .name           = "intel-eth-plat",
+               .pm             = &stmmac_pltfr_pm_ops,
+               .of_match_table = intel_eth_plat_match,
+       },
+};
+module_platform_driver(intel_eth_plat_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Intel DWMAC platform driver");