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arm64: dts: imx8mm-beacon: Enable OV5640 Camera
authorAdam Ford <aford173@gmail.com>
Sun, 28 Nov 2021 12:50:10 +0000 (06:50 -0600)
committerShawn Guo <shawnguo@kernel.org>
Mon, 6 Dec 2021 02:35:43 +0000 (10:35 +0800)
The baseboard has support for a TDNext 5640 Camera which
uses an OV5640 connected to a 2-lane CSI2 interface.

With the CSI and mipi_csi2 drivers pointing to an OV5640 camera, the media
pipeline can be configured with the following:

    media-ctl --links "'ov5640 1-003c':0->'imx7-mipi-csis.0':0[1]"

The camera and various nodes in the pipeline can be configured for UYVY:
    media-ctl -v -V "'ov5640 1-003c':0 [fmt:UYVY8_1X16/640x480 field:none]"
    media-ctl -v -V "'csi':0 [fmt:UYVY8_1X16/640x480 field:none]"

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mm-beacon-baseboard.dtsi

index 4097a66..0da3118 100644 (file)
                enable-active-high;
        };
 
+       reg_camera: regulator-camera {
+               compatible = "regulator-fixed";
+               regulator-name = "mipi_pwr";
+               regulator-min-microvolt = <2800000>;
+               regulator-max-microvolt = <2800000>;
+               gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               startup-delay-us = <100000>;
+       };
+
        reg_usdhc2_vmmc: regulator-usdhc2 {
                compatible = "regulator-fixed";
                regulator-name = "VSD_3V3";
        };
 };
 
+&csi {
+       status = "okay";
+};
+
 &ecspi2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_espi2>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c2>;
        status = "okay";
+
+       camera@3c {
+               compatible = "ovti,ov5640";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_ov5640>;
+               reg = <0x3c>;
+               clocks = <&clk IMX8MM_CLK_CLKO1>;
+               clock-names = "xclk";
+               assigned-clocks = <&clk IMX8MM_CLK_CLKO1>;
+               assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
+               assigned-clock-rates = <24000000>;
+               AVDD-supply = <&reg_camera>;  /* 2.8v */
+               powerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+               reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+
+               port {
+                       /* MIPI CSI-2 bus endpoint */
+                       ov5640_to_mipi_csi2: endpoint {
+                               remote-endpoint = <&imx8mm_mipi_csi_in>;
+                               clock-lanes = <0>;
+                               data-lanes = <1 2>;
+                       };
+               };
+       };
 };
 
 &i2c4 {
        };
 };
 
+&mipi_csi {
+       status = "okay";
+       ports {
+               port@0 {
+                       imx8mm_mipi_csi_in: endpoint {
+                               remote-endpoint = <&ov5640_to_mipi_csi2>;
+                               data-lanes = <1 2>;
+                       };
+               };
+       };
+};
+
 &sai3 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sai3>;
                >;
        };
 
+       pinctrl_ov5640: ov5640grp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7               0x19
+                       MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6               0x19
+                       MX8MM_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1      0x59
+               >;
+       };
+
        pinctrl_pcal6414: pcal6414-gpiogrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27               0x19