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ALSA: hda/cirrus: Add extra 10 ms delay to allow PLL settle and lock.
author
Vitaly Rodionov
<vitalyr@opensource.cirrus.com>
Mon, 5 Dec 2022 14:57:13 +0000
(14:57 +0000)
committer
Takashi Iwai
<tiwai@suse.de>
Mon, 5 Dec 2022 16:42:36 +0000
(17:42 +0100)
New HW platforms with multiple CS42L42 parts, faster CPU and i2c
requre some extra delay to allow PLL to settle and lock. Adding
extra 10ms delay.
Signed-off-by: Vitaly Rodionov <vitalyr@opensource.cirrus.com>
Link:
https://lore.kernel.org/r/20221205145713.23852-1-vitalyr@opensource.cirrus.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
sound/pci/hda/patch_cs8409.c
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diff --git
a/sound/pci/hda/patch_cs8409.c
b/sound/pci/hda/patch_cs8409.c
index
754aa8d
..
0ba1fbc
100644
(file)
--- a/
sound/pci/hda/patch_cs8409.c
+++ b/
sound/pci/hda/patch_cs8409.c
@@
-888,7
+888,7
@@
static void cs42l42_resume(struct sub_codec *cs42l42)
/* Initialize CS42L42 companion codec */
cs8409_i2c_bulk_write(cs42l42, cs42l42->init_seq, cs42l42->init_seq_num);
- usleep_range(
20000, 2
5000);
+ usleep_range(
30000, 3
5000);
/* Clear interrupts, by reading interrupt status registers */
cs8409_i2c_bulk_read(cs42l42, irq_regs, ARRAY_SIZE(irq_regs));