arm64: dts: marvell: add TRNG description for Armada 8K CP

This commits adds the devicetree description of the SafeXcel IP-76 TRNG
found in the two Armada CP110.

Signed-off-by: Romain Perier <romain.perier@free-electrons.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
index e5e3ed6..5f0ea59 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
@@ -164,6 +164,14 @@
                                clocks = <&cpm_syscon0 1 21>;
                                status = "disabled";
                        };
+
+                       cpm_trng: trng@760000 {
+                               compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
+                               reg = <0x760000 0x7d>;
+                               interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cpm_syscon0 1 25>;
+                               status = "okay";
+                       };
                };
 
                cpm_pcie0: pcie@f2600000 {

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
index 842fb33..db2d2a4 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
@@ -164,6 +164,14 @@
                                clocks = <&cps_syscon0 1 21>;
                                status = "disabled";
                        };
+
+                       cps_trng: trng@760000 {
+                               compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
+                               reg = <0x760000 0x7d>;
+                               interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&cps_syscon0 1 25>;
+                               status = "okay";
+                       };
                };
 
                cps_pcie0: pcie@f4600000 {