return -EIO;
if (SND_SOC_DAPM_EVENT_ON(event)) {
- if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
- ret = clk_prepare_enable(priv->mclk);
- if (ret < 0) {
- dev_err(card->dev,
- "could not configure MCLK state\n");
- return ret;
- }
+ ret = clk_prepare_enable(priv->mclk);
+ if (ret < 0) {
+ dev_err(card->dev, "could not configure MCLK state\n");
+ return ret;
}
ret = byt_rt5640_prepare_and_enable_pll1(codec_dai, 48000);
} else {
ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_RCCLK,
48000 * 512,
SND_SOC_CLOCK_IN);
- if (!ret) {
- if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN)
- clk_disable_unprepare(priv->mclk);
- }
+ if (!ret)
+ clk_disable_unprepare(priv->mclk);
}
if (ret < 0) {
return ret;
}
- if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
- /*
- * The firmware might enable the clock at
- * boot (this information may or may not
- * be reflected in the enable clock register).
- * To change the rate we must disable the clock
- * first to cover these cases. Due to common
- * clock framework restrictions that do not allow
- * to disable a clock that has not been enabled,
- * we need to enable the clock first.
- */
- ret = clk_prepare_enable(priv->mclk);
- if (!ret)
- clk_disable_unprepare(priv->mclk);
-
- if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ)
- ret = clk_set_rate(priv->mclk, 25000000);
- else
- ret = clk_set_rate(priv->mclk, 19200000);
+ /*
+ * The firmware might enable the clock at boot (this information
+ * may or may not be reflected in the enable clock register).
+ * To change the rate we must disable the clock first to cover
+ * these cases. Due to common clock framework restrictions that
+ * do not allow to disable a clock that has not been enabled,
+ * we need to enable the clock first.
+ */
+ ret = clk_prepare_enable(priv->mclk);
+ if (!ret)
+ clk_disable_unprepare(priv->mclk);
- if (ret) {
- dev_err(card->dev, "unable to set MCLK rate\n");
- return ret;
- }
+ if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ)
+ ret = clk_set_rate(priv->mclk, 25000000);
+ else
+ ret = clk_set_rate(priv->mclk, 19200000);
+ if (ret) {
+ dev_err(card->dev, "unable to set MCLK rate\n");
+ return ret;
}
if (BYT_RT5640_JDSRC(byt_rt5640_quirk)) {
byt_rt5640_dais[dai_index].cpus->dai_name = "ssp0-port";
if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
- priv->mclk = devm_clk_get(dev, "pmc_plt_clk_3");
+ priv->mclk = devm_clk_get_optional(dev, "pmc_plt_clk_3");
if (IS_ERR(priv->mclk)) {
ret_val = PTR_ERR(priv->mclk);
"Failed to get MCLK from pmc_plt_clk_3: %d\n",
ret_val);
- /*
- * Fall back to bit clock usage for -ENOENT (clock not
- * available likely due to missing dependencies), bail
- * for all other errors, including -EPROBE_DEFER
- */
- if (ret_val != -ENOENT)
- goto err;
- byt_rt5640_quirk &= ~BYT_RT5640_MCLK_EN;
+ goto err;
}
+ /*
+ * Fall back to bit clock usage when clock is not
+ * available likely due to missing dependencies.
+ */
+ if (!priv->mclk)
+ byt_rt5640_quirk &= ~BYT_RT5640_MCLK_EN;
}
if (byt_rt5640_quirk & BYT_RT5640_NO_SPEAKERS) {