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ASoC: Intel: bytcr_rt5640: use devm_clk_get_optional() for mclk
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Thu, 7 Oct 2021 16:57:14 +0000 (19:57 +0300)
committerMark Brown <broonie@kernel.org>
Mon, 11 Oct 2021 13:58:48 +0000 (14:58 +0100)
The devm_clk_get_optional() helper returns NULL when devm_clk_get()
returns -ENOENT. This makes things slightly cleaner. The added benefit
is mostly cosmetic.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20211007165715.27463-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/boards/bytcr_rt5640.c

index 0f609a0..2e7d45f 100644 (file)
@@ -269,13 +269,10 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
                return -EIO;
 
        if (SND_SOC_DAPM_EVENT_ON(event)) {
-               if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
-                       ret = clk_prepare_enable(priv->mclk);
-                       if (ret < 0) {
-                               dev_err(card->dev,
-                                       "could not configure MCLK state\n");
-                               return ret;
-                       }
+               ret = clk_prepare_enable(priv->mclk);
+               if (ret < 0) {
+                       dev_err(card->dev, "could not configure MCLK state\n");
+                       return ret;
                }
                ret = byt_rt5640_prepare_and_enable_pll1(codec_dai, 48000);
        } else {
@@ -287,10 +284,8 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w,
                ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_RCCLK,
                                             48000 * 512,
                                             SND_SOC_CLOCK_IN);
-               if (!ret) {
-                       if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN)
-                               clk_disable_unprepare(priv->mclk);
-               }
+               if (!ret)
+                       clk_disable_unprepare(priv->mclk);
        }
 
        if (ret < 0) {
@@ -1217,30 +1212,25 @@ static int byt_rt5640_init(struct snd_soc_pcm_runtime *runtime)
                        return ret;
        }
 
-       if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
-               /*
-                * The firmware might enable the clock at
-                * boot (this information may or may not
-                * be reflected in the enable clock register).
-                * To change the rate we must disable the clock
-                * first to cover these cases. Due to common
-                * clock framework restrictions that do not allow
-                * to disable a clock that has not been enabled,
-                * we need to enable the clock first.
-                */
-               ret = clk_prepare_enable(priv->mclk);
-               if (!ret)
-                       clk_disable_unprepare(priv->mclk);
-
-               if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ)
-                       ret = clk_set_rate(priv->mclk, 25000000);
-               else
-                       ret = clk_set_rate(priv->mclk, 19200000);
+       /*
+        * The firmware might enable the clock at boot (this information
+        * may or may not be reflected in the enable clock register).
+        * To change the rate we must disable the clock first to cover
+        * these cases. Due to common clock framework restrictions that
+        * do not allow to disable a clock that has not been enabled,
+        * we need to enable the clock first.
+        */
+       ret = clk_prepare_enable(priv->mclk);
+       if (!ret)
+               clk_disable_unprepare(priv->mclk);
 
-               if (ret) {
-                       dev_err(card->dev, "unable to set MCLK rate\n");
-                       return ret;
-               }
+       if (byt_rt5640_quirk & BYT_RT5640_MCLK_25MHZ)
+               ret = clk_set_rate(priv->mclk, 25000000);
+       else
+               ret = clk_set_rate(priv->mclk, 19200000);
+       if (ret) {
+               dev_err(card->dev, "unable to set MCLK rate\n");
+               return ret;
        }
 
        if (BYT_RT5640_JDSRC(byt_rt5640_quirk)) {
@@ -1653,7 +1643,7 @@ static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
                byt_rt5640_dais[dai_index].cpus->dai_name = "ssp0-port";
 
        if (byt_rt5640_quirk & BYT_RT5640_MCLK_EN) {
-               priv->mclk = devm_clk_get(dev, "pmc_plt_clk_3");
+               priv->mclk = devm_clk_get_optional(dev, "pmc_plt_clk_3");
                if (IS_ERR(priv->mclk)) {
                        ret_val = PTR_ERR(priv->mclk);
 
@@ -1661,15 +1651,14 @@ static int snd_byt_rt5640_mc_probe(struct platform_device *pdev)
                                "Failed to get MCLK from pmc_plt_clk_3: %d\n",
                                ret_val);
 
-                       /*
-                        * Fall back to bit clock usage for -ENOENT (clock not
-                        * available likely due to missing dependencies), bail
-                        * for all other errors, including -EPROBE_DEFER
-                        */
-                       if (ret_val != -ENOENT)
-                               goto err;
-                       byt_rt5640_quirk &= ~BYT_RT5640_MCLK_EN;
+                       goto err;
                }
+               /*
+                * Fall back to bit clock usage when clock is not
+                * available likely due to missing dependencies.
+                */
+               if (!priv->mclk)
+                       byt_rt5640_quirk &= ~BYT_RT5640_MCLK_EN;
        }
 
        if (byt_rt5640_quirk & BYT_RT5640_NO_SPEAKERS) {