../hd44102.cpp
../hd46505.cpp
../hd63484.cpp
-# ../huc6280.cpp
+ ../huc6280_base.cpp
# ../i286.cpp
# ../i386.cpp
../i8080_base.cpp
${s_vm_common_vm_srcs}
)
set_target_properties(CSPcommon_vm PROPERTIES
- SOVERSION 1.1.12
- VERSION 1.1.12
+ SOVERSION 1.1.13
+ VERSION 1.1.13
)
INSTALL(TARGETS CSPcommon_vm DESTINATION ${LIBCSP_INSTALL_DIR})
endif()
/* src/emu/devcpu.h */
// CPU interface functions
-#define CPU_INIT_NAME(name) cpu_init_##name
-#define CPU_INIT(name) void* CPU_INIT_NAME(name)()
-#define CPU_INIT_CALL(name) CPU_INIT_NAME(name)()
-
-#define CPU_RESET_NAME(name) cpu_reset_##name
-#define CPU_RESET(name) void CPU_RESET_NAME(name)(h6280_Regs *cpustate)
-#define CPU_RESET_CALL(name) CPU_RESET_NAME(name)(cpustate)
-
-#define CPU_EXECUTE_NAME(name) cpu_execute_##name
-#define CPU_EXECUTE(name) int CPU_EXECUTE_NAME(name)(h6280_Regs *cpustate)
-#define CPU_EXECUTE_CALL(name) CPU_EXECUTE_NAME(name)(cpustate)
-
-#define CPU_DISASSEMBLE_NAME(name) cpu_disassemble_##name
-#define CPU_DISASSEMBLE(name) int CPU_DISASSEMBLE_NAME(name)(_TCHAR *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, symbol_t *first_symbol)
-#define CPU_DISASSEMBLE_CALL(name) CPU_DISASSEMBLE_NAME(name)(buffer, pc, oprom, oprom, d_debugger->first_symbol)
-
#define READ8_HANDLER(name) UINT8 name(h6280_Regs *cpustate, offs_t offset)
#define WRITE8_HANDLER(name) void name(h6280_Regs *cpustate, offs_t offset, UINT8 data)
-/*****************************************************************************/
-/* src/emu/didisasm.h */
-
-// Disassembler constants
-const UINT32 DASMFLAG_SUPPORTED = 0x80000000; // are disassembly flags supported?
-const UINT32 DASMFLAG_STEP_OUT = 0x40000000; // this instruction should be the end of a step out sequence
-const UINT32 DASMFLAG_STEP_OVER = 0x20000000; // this instruction should be stepped over by setting a breakpoint afterwards
-const UINT32 DASMFLAG_OVERINSTMASK = 0x18000000; // number of extra instructions to skip when stepping over
-const UINT32 DASMFLAG_OVERINSTSHIFT = 27; // bits to shift after masking to get the value
-const UINT32 DASMFLAG_LENGTHMASK = 0x0000ffff; // the low 16-bits contain the actual length
-
-/*****************************************************************************/
-/* src/emu/diexec.h */
-
-// I/O line states
-enum line_state
-{
- CLEAR_LINE = 0, // clear (a fired or held) line
- ASSERT_LINE, // assert an interrupt immediately
- HOLD_LINE, // hold interrupt line until acknowledged
- PULSE_LINE // pulse interrupt line instantaneously (only for NMI, RESET)
-};
-
-enum
-{
- INPUT_LINE_IRQ1 = 0,
- INPUT_LINE_IRQ2 = 1,
- INPUT_LINE_TIRQ = 2,
- INPUT_LINE_NMI
-};
-
-#define logerror(...)
-
-#include "mame/emu/cpu/h6280/h6280.c"
-#ifdef USE_DEBUGGER
-#include "mame/emu/cpu/h6280/6280dasm.c"
-#endif
+#include "mame/emu/cpu/h6280/h6280.h"
+//#include "mame/emu/cpu/h6280/h6280.c"
+//#ifdef USE_DEBUGGER
+//#include "mame/emu/cpu/h6280/6280dasm.c"
+//#endif
// main
-
void HUC6280::initialize()
{
- DEVICE::initialize();
- opaque = CPU_INIT_CALL(h6280);
+ HUC6280_BASE::initialize();
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
- cpustate->program = d_mem;
- cpustate->io = d_io;
#ifdef USE_DEBUGGER
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
cpustate->emu = emu;
cpustate->debugger = d_debugger;
cpustate->program_stored = d_mem;
void HUC6280::reset()
{
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
-
- CPU_RESET_CALL(h6280);
-
- cpustate->program = d_mem;
- cpustate->io = d_io;
+ HUC6280_BASE::reset();
#ifdef USE_DEBUGGER
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
cpustate->emu = emu;
cpustate->debugger = d_debugger;
cpustate->program_stored = d_mem;
cpustate->io_stored = d_io;
#endif
- icount = 0;
- busreq = false;
}
int HUC6280::run(int clock)
return 1;
} else {
// run only one opcode
- return CPU_EXECUTE_CALL(h6280);
+#ifdef USE_DEBUGGER
+ return exec_call_debug();
+#else
+ return exec_call();
+#endif
}
} else {
icount += clock;
// run cpu while given clocks
while(icount > 0 && !busreq) {
- icount -= CPU_EXECUTE_CALL(h6280);
+#ifdef USE_DEBUGGER
+ icount -= exec_call_debug();
+#else
+ icount -= exec_call();
+#endif
}
// if busreq is raised, spin cpu while remained clock
if(icount > 0 && busreq) {
}
}
-void HUC6280::write_signal(int id, uint32_t data, uint32_t mask)
-{
- if(id == SIG_CPU_BUSREQ) {
- busreq = ((data & mask) != 0);
- } else {
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
- set_irq_line(cpustate, id, data);
- }
-}
-
-uint32_t HUC6280::get_pc()
-{
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
- return cpustate->ppc.w.l;
-}
-
-uint32_t HUC6280::get_next_pc()
-{
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
- return cpustate->pc.w.l;
-}
-
-uint8_t HUC6280::irq_status_r(uint16_t offset)
-{
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
- return h6280_irq_status_r(cpustate, offset);
-}
-
-void HUC6280::irq_status_w(uint16_t offset, uint8_t data)
-{
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
- h6280_irq_status_w(cpustate, offset, data);
-}
-
-uint8_t HUC6280::timer_r(uint16_t offset)
-{
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
- return h6280_timer_r(cpustate, offset);
-}
-
-void HUC6280::timer_w(uint16_t offset, uint8_t data)
-{
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
- h6280_timer_w(cpustate, offset, data);
-}
-
-#ifdef USE_DEBUGGER
-void HUC6280::write_debug_data8(uint32_t addr, uint32_t data)
-{
- int wait;
- d_mem->write_data8w(addr, data, &wait);
-}
-
-uint32_t HUC6280::read_debug_data8(uint32_t addr)
-{
- int wait;
- return d_mem->read_data8w(addr, &wait);
-}
-
-void HUC6280::write_debug_io8(uint32_t addr, uint32_t data)
-{
- int wait;
- d_io->write_io8w(addr, data, &wait);
-}
-
-uint32_t HUC6280::read_debug_io8(uint32_t addr) {
- int wait;
- return d_io->read_io8w(addr, &wait);
-}
-
-bool HUC6280::write_debug_reg(const _TCHAR *reg, uint32_t data)
-{
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
- if(_tcsicmp(reg, _T("PC")) == 0) {
- cpustate->pc.w.l = data;
- } if(_tcsicmp(reg, _T("SP")) == 0) {
- cpustate->sp.w.l = data;
- } if(_tcsicmp(reg, _T("ZP")) == 0) {
- cpustate->zp.w.l = data;
- } if(_tcsicmp(reg, _T("EA")) == 0) {
- cpustate->ea.w.l = data;
- } if(_tcsicmp(reg, _T("A")) == 0) {
- cpustate->a = data;
- } if(_tcsicmp(reg, _T("X")) == 0) {
- cpustate->x = data;
- } if(_tcsicmp(reg, _T("Y")) == 0) {
- cpustate->y = data;
- } if(_tcsicmp(reg, _T("P")) == 0) {
- cpustate->p = data;
- } else {
- return false;
- }
- return true;
-}
-
-void HUC6280::get_debug_regs_info(_TCHAR *buffer, size_t buffer_len)
-{
- h6280_Regs *cpustate = (h6280_Regs *)opaque;
- my_stprintf_s(buffer, buffer_len,
- _T("PC = %04X SP = %04X ZP = %04X EA = %04X A = %02X X = %02X Y = %02X P = %02X"),
- cpustate->pc.w.l, cpustate->sp.w.l, cpustate->zp.w.l, cpustate->ea.w.l, cpustate->a, cpustate->x, cpustate->y, cpustate->p);
-}
-
-// disassembler
-
-int HUC6280::debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len)
-{
- uint8_t oprom[8];
- uint8_t *opram = oprom;
-
- for(int i = 0; i < 8; i++) {
- int wait;
- oprom[i] = d_mem->read_data8w(pc + i, &wait);
- }
- return CPU_DISASSEMBLE_CALL(h6280) & DASMFLAG_LENGTHMASK;
-}
-#endif
-
-#define STATE_VERSION 3
+#define STATE_VERSION 4
void HUC6280::save_state(FILEIO* state_fio)
{
state_fio->FputUint32(STATE_VERSION);
state_fio->FputInt32(this_device_id);
- state_fio->Fwrite(opaque, sizeof(h6280_Regs), 1);
+ //state_fio->Fwrite(opaque, sizeof(h6280_Regs), 1);
+ save_state_registers(state_fio);
state_fio->FputInt32(icount);
state_fio->FputBool(busreq);
}
if(state_fio->FgetInt32() != this_device_id) {
return false;
}
- state_fio->Fread(opaque, sizeof(h6280_Regs), 1);
+ //state_fio->Fread(opaque, sizeof(h6280_Regs), 1);
+ load_state_registers(state_fio);
icount = state_fio->FgetInt32();
busreq = state_fio->FgetBool();
#include "../emu.h"
#include "device.h"
-#ifdef USE_DEBUGGER
+//#ifdef USE_DEBUGGER
class DEBUGGER;
-#endif
+//#endif
-class HUC6280 : public DEVICE
+class HUC6280_BASE : public DEVICE
{
-private:
+protected:
DEVICE *d_mem, *d_io;
-#ifdef USE_DEBUGGER
+//#ifdef USE_DEBUGGER
DEBUGGER *d_debugger;
-#endif
+//#endif
void *opaque;
int icount;
bool busreq;
+ int exec_call(void);
+ int exec_call_debug(void);
public:
- HUC6280(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu) {
+ HUC6280_BASE(VM* parent_vm, EMU* parent_emu) : DEVICE(parent_vm, parent_emu) {
set_device_name(_T("HuC6280 CPU"));
}
- ~HUC6280() {}
+ ~HUC6280_BASE() {}
// common functions
- void initialize();
- void release();
- void reset();
- int run(int clock);
+ virtual void initialize();
+ virtual void release();
+ virtual void reset();
+ virtual int run(int clock);
void write_signal(int id, uint32_t data, uint32_t mask);
uint32_t get_pc();
uint32_t get_next_pc();
-#ifdef USE_DEBUGGER
+//#ifdef USE_DEBUGGER
void *get_debugger()
{
return d_debugger;
bool write_debug_reg(const _TCHAR *reg, uint32_t data);
void get_debug_regs_info(_TCHAR *buffer, size_t buffer_len);
int debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len);
-#endif
- void save_state(FILEIO* state_fio);
- bool load_state(FILEIO* state_fio);
+//#endif
+ void save_state_registers(FILEIO* state_fio);
+ void load_state_registers(FILEIO* state_fio);
// unique function
void set_context_mem(DEVICE* device)
{
d_io = device;
}
+ uint8_t irq_status_r(uint16_t offset);
+ void irq_status_w(uint16_t offset, uint8_t data);
+ uint8_t timer_r(uint16_t offset);
+ void timer_w(uint16_t offset, uint8_t data);
+};
+
+class HUC6280 : public HUC6280_BASE
+{
+private:
+
+public:
+ HUC6280(VM* parent_vm, EMU* parent_emu) : HUC6280_BASE(parent_vm, parent_emu) {
+ set_device_name(_T("HuC6280 CPU"));
+ }
+ ~HUC6280() {}
+
+ // common functions
+ void initialize();
+ void release();
+ void reset();
+ int run(int clock);
+
+ void save_state(FILEIO* state_fio);
+ bool load_state(FILEIO* state_fio);
+
#ifdef USE_DEBUGGER
void set_context_debugger(DEBUGGER* device)
{
d_debugger = device;
}
#endif
- uint8_t irq_status_r(uint16_t offset);
- void irq_status_w(uint16_t offset, uint8_t data);
- uint8_t timer_r(uint16_t offset);
- void timer_w(uint16_t offset, uint8_t data);
};
#endif
--- /dev/null
+/*
+ Skelton for retropc emulator
+
+ Origin : MESS 0.147
+ Author : Takeda.Toshiya
+ Date : 2012.10.23-
+
+ [ HuC6280 ]
+*/
+
+#include "huc6280.h"
+//#ifdef USE_DEBUGGER
+#include "debugger.h"
+//#endif
+
+/* ----------------------------------------------------------------------------
+ MAME h6280
+---------------------------------------------------------------------------- */
+
+#define INLINE inline
+#define PAIR pair_t
+#define offs_t UINT16
+
+/*****************************************************************************/
+/* src/emu/devcpu.h */
+
+// CPU interface functions
+#define CPU_INIT_NAME(name) cpu_init_##name
+#define CPU_INIT(name) void* CPU_INIT_NAME(name)()
+#define CPU_INIT_CALL(name) CPU_INIT_NAME(name)()
+
+#define CPU_RESET_NAME(name) cpu_reset_##name
+#define CPU_RESET(name) void CPU_RESET_NAME(name)(h6280_Regs *cpustate)
+#define CPU_RESET_CALL(name) CPU_RESET_NAME(name)(cpustate)
+
+#define CPU_EXECUTE_NAME(name) cpu_execute_##name
+#define CPU_EXECUTE(name) int CPU_EXECUTE_NAME(name)(h6280_Regs *cpustate)
+#define CPU_EXECUTE_CALL(name) CPU_EXECUTE_NAME(name)(cpustate)
+
+#define CPU_DISASSEMBLE_NAME(name) cpu_disassemble_##name
+#define CPU_DISASSEMBLE(name) int CPU_DISASSEMBLE_NAME(name)(_TCHAR *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, symbol_t *first_symbol)
+#define CPU_DISASSEMBLE_CALL(name) CPU_DISASSEMBLE_NAME(name)(buffer, pc, oprom, oprom, d_debugger->first_symbol)
+
+#define READ8_HANDLER(name) UINT8 name(h6280_Regs *cpustate, offs_t offset)
+#define WRITE8_HANDLER(name) void name(h6280_Regs *cpustate, offs_t offset, UINT8 data)
+
+/*****************************************************************************/
+/* src/emu/didisasm.h */
+
+// Disassembler constants
+const UINT32 DASMFLAG_SUPPORTED = 0x80000000; // are disassembly flags supported?
+const UINT32 DASMFLAG_STEP_OUT = 0x40000000; // this instruction should be the end of a step out sequence
+const UINT32 DASMFLAG_STEP_OVER = 0x20000000; // this instruction should be stepped over by setting a breakpoint afterwards
+const UINT32 DASMFLAG_OVERINSTMASK = 0x18000000; // number of extra instructions to skip when stepping over
+const UINT32 DASMFLAG_OVERINSTSHIFT = 27; // bits to shift after masking to get the value
+const UINT32 DASMFLAG_LENGTHMASK = 0x0000ffff; // the low 16-bits contain the actual length
+
+/*****************************************************************************/
+/* src/emu/diexec.h */
+
+// I/O line states
+enum line_state
+{
+ CLEAR_LINE = 0, // clear (a fired or held) line
+ ASSERT_LINE, // assert an interrupt immediately
+ HOLD_LINE, // hold interrupt line until acknowledged
+ PULSE_LINE // pulse interrupt line instantaneously (only for NMI, RESET)
+};
+
+enum
+{
+ INPUT_LINE_IRQ1 = 0,
+ INPUT_LINE_IRQ2 = 1,
+ INPUT_LINE_TIRQ = 2,
+ INPUT_LINE_NMI
+};
+
+#define logerror(...)
+
+#include "mame/emu/cpu/h6280/h6280.c"
+//#ifdef USE_DEBUGGER
+#include "mame/emu/cpu/h6280/6280dasm.c"
+//#endif
+
+// main
+
+void HUC6280_BASE::initialize()
+{
+ DEVICE::initialize();
+ opaque = CPU_INIT_CALL(h6280);
+
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ cpustate->program = d_mem;
+ cpustate->io = d_io;
+
+}
+void HUC6280_BASE::release()
+{
+}
+
+void HUC6280_BASE::reset()
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+
+ CPU_RESET_CALL(h6280);
+
+ cpustate->program = d_mem;
+ cpustate->io = d_io;
+ icount = 0;
+ busreq = false;
+}
+
+int HUC6280_BASE::run(int clocks)
+{
+ return 0;
+}
+
+int HUC6280_BASE::exec_call(void)
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ return CPU_EXECUTE_CALL(h6280);
+}
+
+int HUC6280_BASE::exec_call_debug(void)
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ return CPU_EXECUTE_CALL(h6280_debug);
+}
+
+void HUC6280_BASE::write_signal(int id, uint32_t data, uint32_t mask)
+{
+ if(id == SIG_CPU_BUSREQ) {
+ busreq = ((data & mask) != 0);
+ } else {
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ set_irq_line(cpustate, id, data);
+ }
+}
+
+uint32_t HUC6280_BASE::get_pc()
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ return cpustate->ppc.w.l;
+}
+
+uint32_t HUC6280_BASE::get_next_pc()
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ return cpustate->pc.w.l;
+}
+
+uint8_t HUC6280_BASE::irq_status_r(uint16_t offset)
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ return h6280_irq_status_r(cpustate, offset);
+}
+
+void HUC6280_BASE::irq_status_w(uint16_t offset, uint8_t data)
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ h6280_irq_status_w(cpustate, offset, data);
+}
+
+uint8_t HUC6280_BASE::timer_r(uint16_t offset)
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ return h6280_timer_r(cpustate, offset);
+}
+
+void HUC6280_BASE::timer_w(uint16_t offset, uint8_t data)
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ h6280_timer_w(cpustate, offset, data);
+}
+
+//#ifdef USE_DEBUGGER
+void HUC6280_BASE::write_debug_data8(uint32_t addr, uint32_t data)
+{
+ int wait;
+ d_mem->write_data8w(addr, data, &wait);
+}
+
+uint32_t HUC6280_BASE::read_debug_data8(uint32_t addr)
+{
+ int wait;
+ return d_mem->read_data8w(addr, &wait);
+}
+
+void HUC6280_BASE::write_debug_io8(uint32_t addr, uint32_t data)
+{
+ int wait;
+ d_io->write_io8w(addr, data, &wait);
+}
+
+uint32_t HUC6280_BASE::read_debug_io8(uint32_t addr) {
+ int wait;
+ return d_io->read_io8w(addr, &wait);
+}
+
+bool HUC6280_BASE::write_debug_reg(const _TCHAR *reg, uint32_t data)
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ if(_tcsicmp(reg, _T("PC")) == 0) {
+ cpustate->pc.w.l = data;
+ } if(_tcsicmp(reg, _T("SP")) == 0) {
+ cpustate->sp.w.l = data;
+ } if(_tcsicmp(reg, _T("ZP")) == 0) {
+ cpustate->zp.w.l = data;
+ } if(_tcsicmp(reg, _T("EA")) == 0) {
+ cpustate->ea.w.l = data;
+ } if(_tcsicmp(reg, _T("A")) == 0) {
+ cpustate->a = data;
+ } if(_tcsicmp(reg, _T("X")) == 0) {
+ cpustate->x = data;
+ } if(_tcsicmp(reg, _T("Y")) == 0) {
+ cpustate->y = data;
+ } if(_tcsicmp(reg, _T("P")) == 0) {
+ cpustate->p = data;
+ } else {
+ return false;
+ }
+ return true;
+}
+
+void HUC6280_BASE::get_debug_regs_info(_TCHAR *buffer, size_t buffer_len)
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ my_stprintf_s(buffer, buffer_len,
+ _T("PC = %04X SP = %04X ZP = %04X EA = %04X A = %02X X = %02X Y = %02X P = %02X"),
+ cpustate->pc.w.l, cpustate->sp.w.l, cpustate->zp.w.l, cpustate->ea.w.l, cpustate->a, cpustate->x, cpustate->y, cpustate->p);
+}
+
+// disassembler
+
+int HUC6280_BASE::debug_dasm(uint32_t pc, _TCHAR *buffer, size_t buffer_len)
+{
+ uint8_t oprom[8];
+ uint8_t *opram = oprom;
+
+ for(int i = 0; i < 8; i++) {
+ int wait;
+ oprom[i] = d_mem->read_data8w(pc + i, &wait);
+ }
+ return CPU_DISASSEMBLE_CALL(h6280) & DASMFLAG_LENGTHMASK;
+}
+//#endif
+
+void HUC6280_BASE::save_state_registers(FILEIO* state_fio)
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+
+ state_fio->FputInt32(cpustate->ICount);
+ state_fio->Fwrite(&(cpustate->ppc), sizeof(PAIR), 1);
+ state_fio->Fwrite(&(cpustate->pc), sizeof(PAIR), 1);
+ state_fio->Fwrite(&(cpustate->sp), sizeof(PAIR), 1);
+ state_fio->Fwrite(&(cpustate->zp), sizeof(PAIR), 1);
+ state_fio->Fwrite(&(cpustate->ea), sizeof(PAIR), 1);
+ state_fio->FputUint8(cpustate->a);
+ state_fio->FputUint8(cpustate->x);
+ state_fio->FputUint8(cpustate->y);
+ state_fio->FputUint8(cpustate->p);
+ state_fio->Fwrite(&(cpustate->mmr), sizeof(uint8_t) * 8, 1);
+ state_fio->FputUint8(cpustate->irq_mask);
+ state_fio->FputUint8(cpustate->timer_status);
+ state_fio->FputUint8(cpustate->timer_ack);
+ state_fio->FputUint8(cpustate->clocks_per_cycle);
+ state_fio->FputInt32(cpustate->timer_value);
+ state_fio->FputInt32(cpustate->timer_load);
+ state_fio->FputUint8(cpustate->nmi_state);
+ state_fio->Fwrite(&(cpustate->irq_state), sizeof(uint8_t) * 3, 1);
+ state_fio->FputUint8(cpustate->irq_pending);
+}
+
+void HUC6280_BASE::load_state_registers(FILEIO* state_fio)
+{
+ h6280_Regs *cpustate = (h6280_Regs *)opaque;
+ cpustate->ICount = state_fio->FgetInt32();
+ state_fio->Fread(&(cpustate->ppc), sizeof(PAIR), 1);
+ state_fio->Fread(&(cpustate->pc), sizeof(PAIR), 1);
+ state_fio->Fread(&(cpustate->sp), sizeof(PAIR), 1);
+ state_fio->Fread(&(cpustate->zp), sizeof(PAIR), 1);
+ state_fio->Fread(&(cpustate->ea), sizeof(PAIR), 1);
+ cpustate->a = state_fio->FgetUint8();
+ cpustate->x = state_fio->FgetUint8();
+ cpustate->y = state_fio->FgetUint8();
+ cpustate->p = state_fio->FgetUint8();
+ state_fio->Fread(&(cpustate->mmr), sizeof(uint8_t) * 8, 1);
+ cpustate->irq_mask = state_fio->FgetUint8();
+ cpustate->timer_status = state_fio->FgetUint8();
+ cpustate->timer_ack = state_fio->FgetUint8();
+ cpustate->clocks_per_cycle = state_fio->FgetUint8();
+ cpustate->timer_value = state_fio->FgetInt32();
+ cpustate->timer_load = state_fio->FgetInt32();
+ cpustate->nmi_state = state_fio->FgetUint8();
+ state_fio->Fread(&(cpustate->irq_state), sizeof(uint8_t) * 3, 1);
+ cpustate->irq_pending = state_fio->FgetUint8();
+}
+
+
******************************************************************************/
//#include "emu.h"
-//#include "debugger.h"
+#include "debugger.h"
#include "h6280.h"
static void set_irq_line(h6280_Regs* cpustate, int irqline, int state);
#include "tblh6280.c"
/*****************************************************************************/
-static CPU_INIT( h6280 )
+CPU_INIT( h6280 )
{
h6280_Regs *cpustate = (h6280_Regs *)calloc(1, sizeof(h6280_Regs));
return cpustate;
}
-static CPU_RESET( h6280 )
+CPU_RESET( h6280 )
{
int i;
cpustate->irq_pending = 0;
}
-static CPU_EXECUTE( h6280 )
+CPU_EXECUTE( h6280 )
+{
+ int in;
+
+ if ( cpustate->irq_pending == 2 ) {
+ cpustate->irq_pending--;
+ }
+
+ /* Execute instructions */
+ cpustate->ICount = 0;
+ cpustate->ppc = cpustate->pc;
+
+ /* Execute 1 instruction */
+ in=RDOP();
+ PCW++;
+ insnh6280[in](cpustate);
+
+ if ( cpustate->irq_pending ) {
+ if ( cpustate->irq_pending == 1 ) {
+ if ( !(P & _fI) ) {
+ cpustate->irq_pending--;
+ CHECK_AND_TAKE_IRQ_LINES;
+ }
+ } else {
+ cpustate->irq_pending--;
+ }
+ }
+
+ /* Check internal timer */
+ if(cpustate->timer_status)
+ {
+ if(cpustate->timer_value<=0)
+ {
+ if ( ! cpustate->irq_pending )
+ cpustate->irq_pending = 1;
+ while( cpustate->timer_value <= 0 )
+ cpustate->timer_value += cpustate->timer_load;
+ set_irq_line(cpustate, 2,ASSERT_LINE);
+ }
+ }
+// } while (cpustate->ICount > 0);
+ return -cpustate->ICount;
+}
+
+/* Run with debugger */
+CPU_EXECUTE( h6280_debug )
{
int in;
cpustate->ICount = 0;
// do
// {
-#ifdef USE_DEBUGGER
+//#ifdef USE_DEBUGGER
bool now_debugging = cpustate->debugger->now_debugging;
if(now_debugging) {
cpustate->debugger->check_break_points(cpustate->pc.w.l);
cpustate->io = cpustate->io_stored;
}
} else {
-#endif
+//#endif
cpustate->ppc = cpustate->pc;
/* Execute 1 instruction */
in=RDOP();
PCW++;
insnh6280[in](cpustate);
-#ifdef USE_DEBUGGER
+//#ifdef USE_DEBUGGER
}
-#endif
+//#endif
if ( cpustate->irq_pending ) {
if ( cpustate->irq_pending == 1 ) {
UINT8 irq_pending;
DEVICE *program;
DEVICE *io;
-#ifdef USE_DEBUGGER
+//#ifdef USE_DEBUGGER
EMU *emu;
DEBUGGER *debugger;
DEVICE *program_stored;
DEVICE *io_stored;
-#endif
+//#endif
#if LAZY_FLAGS
INT32 NZ; /* last value (lazy N and Z flag) */
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