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drm/amdgpu/discovery: add module param for ip discovery enablement
authorXiaojie Yuan <xiaojie.yuan@amd.com>
Wed, 27 Mar 2019 04:39:18 +0000 (12:39 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 21 Jun 2019 23:58:21 +0000 (18:58 -0500)
to control enablement.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

index baadd00..60b5ae7 100644 (file)
@@ -161,6 +161,7 @@ extern int amdgpu_ras_enable;
 extern uint amdgpu_ras_mask;
 extern int amdgpu_async_gfx_ring;
 extern int amdgpu_mcbp;
+extern int amdgpu_discovery;
 
 #ifdef CONFIG_DRM_AMDGPU_SI
 extern int amdgpu_si_support;
index 716e35a..107a195 100644 (file)
@@ -2578,6 +2578,14 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        if (amdgpu_mcbp)
                DRM_INFO("MCBP is enabled\n");
 
+       if (amdgpu_discovery) {
+               r = amdgpu_discovery_init(adev);
+               if (r) {
+                       dev_err(adev->dev, "amdgpu_discovery_init failed\n");
+                       return r;
+               }
+       }
+
        /* early init functions */
        r = amdgpu_device_ip_early_init(adev);
        if (r)
@@ -2838,6 +2846,8 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
        amdgpu_ucode_sysfs_fini(adev);
        amdgpu_pmu_fini(adev);
        amdgpu_debugfs_preempt_cleanup(adev);
+       if (amdgpu_discovery)
+               amdgpu_discovery_fini(adev);
 }
 
 
index fc92f71..df1a298 100644 (file)
@@ -138,6 +138,7 @@ uint amdgpu_smu_memory_pool_size = 0;
 uint amdgpu_dc_feature_mask = 0;
 int amdgpu_async_gfx_ring = 1;
 int amdgpu_mcbp = 0;
+int amdgpu_discovery = 0;
 
 struct amdgpu_mgpu_info mgpu_info = {
        .mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),
@@ -579,6 +580,10 @@ MODULE_PARM_DESC(mcbp,
        "Enable Mid-command buffer preemption (0 = disabled (default), 1 = enabled)");
 module_param_named(mcbp, amdgpu_mcbp, int, 0444);
 
+MODULE_PARM_DESC(discovery,
+       "Allow driver to discover hardware IPs from IP Discovery table at the top of VRAM");
+module_param_named(discovery, amdgpu_discovery, int, 0444);
+
 #ifdef CONFIG_HSA_AMD
 /**
  * DOC: sched_policy (int)