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libnvdimm/region: Fix nvdimm_has_flush() to handle ND_REGION_ASYNC
authorVaibhav Jain <vaibhav@linux.ibm.com>
Fri, 2 Apr 2021 09:25:55 +0000 (14:55 +0530)
committerDan Williams <dan.j.williams@intel.com>
Sat, 10 Apr 2021 04:56:01 +0000 (21:56 -0700)
In case a platform doesn't provide explicit flush-hints but provides an
explicit flush callback via ND_REGION_ASYNC region flag, then
nvdimm_has_flush() still returns '0' indicating that writes do not
require flushing. This happens on PPC64 with patch at [1] applied, where
'deep_flush' of a region was denied even though an explicit flush
function was provided.

Fix this by adding a condition to nvdimm_has_flush() to test for the
ND_REGION_ASYNC flag on the region and see if a 'region->flush' callback
is assigned.

Link: http://lore.kernel.org/r/161703936121.36.7260632399582101498.stgit@e1fbed493c87
Fixes: c5d4355d10d4 ("libnvdimm: nd_region flush callback support")
Reported-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com>
Link: https://lore.kernel.org/r/20210402092555.208590-1-vaibhav@linux.ibm.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/nvdimm/region_devs.c

index 51870eb..9ccf3d6 100644 (file)
@@ -1246,6 +1246,11 @@ int nvdimm_has_flush(struct nd_region *nd_region)
                        || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
                return -ENXIO;
 
+       /* Test if an explicit flush function is defined */
+       if (test_bit(ND_REGION_ASYNC, &nd_region->flags) && nd_region->flush)
+               return 1;
+
+       /* Test if any flush hints for the region are available */
        for (i = 0; i < nd_region->ndr_mappings; i++) {
                struct nd_mapping *nd_mapping = &nd_region->mapping[i];
                struct nvdimm *nvdimm = nd_mapping->nvdimm;
@@ -1256,8 +1261,8 @@ int nvdimm_has_flush(struct nd_region *nd_region)
        }
 
        /*
-        * The platform defines dimm devices without hints, assume
-        * platform persistence mechanism like ADR
+        * The platform defines dimm devices without hints nor explicit flush,
+        * assume platform persistence mechanism like ADR
         */
        return 0;
 }