* sidcomp.cfgroot/dupName.badconf: Remove ARM-specific components.

	* sidcomp.cfgroot/multiDso.badconf: Likewise.
	* sidcomp.cfgroot/CBinvaComp.badconf: Likewise.
	* sidcomp.cfgroot/dupName.expect: Update to reflect new inputs.
	* sidcomp.cfgroot/multiDso.expect: Likewise.

diff --git a/sid/component/testsuite/ChangeLog b/sid/component/testsuite/ChangeLog
index 0aa3b96..b1c5365 100644 (file)
--- a/sid/component/testsuite/ChangeLog
+++ b/sid/component/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2001-05-17  Ben Elliston  <bje@redhat.com>
+
+       * sidcomp.cfgroot/dupName.badconf: Remove ARM-specific components.
+       * sidcomp.cfgroot/multiDso.badconf: Likewise.
+       * sidcomp.cfgroot/CBinvaComp.badconf: Likewise.
+       * sidcomp.cfgroot/dupName.expect: Update to reflect new inputs.
+       * sidcomp.cfgroot/multiDso.expect: Likewise.
+
 2001-05-14  Ben Elliston  <bje@redhat.com>
 
        * sidcomp.cgen-cpu.arm7t/armconf.exp: Update srcdir names.

diff --git a/sid/component/testsuite/sidcomp.cfgroot/CBinvaComp.badconf b/sid/component/testsuite/sidcomp.cfgroot/CBinvaComp.badconf
index 91f7b58..7a01c23 100644 (file)
--- a/sid/component/testsuite/sidcomp.cfgroot/CBinvaComp.badconf
+++ b/sid/component/testsuite/sidcomp.cfgroot/CBinvaComp.badconf
@@ -17,18 +17,12 @@ load libtimers.la timer_component_library
 
 # Components
 
-new hw-cpu-arm7t cpu
 new sw-load-elf loader
 new sid-io-stdio stdio
-new sw-gloss-arm/angel angel
-new hw-interrupt-arm/ref intctrl
 new hw-mapper-basic bus
-new hw-remap/pause-arm/ref remapper
 new sid-sched-host host-sched
 new sid-sched-sim target-sched
 new hw-memory-ram/rom-basic mem
-new hw-timer-arm/ref-sched timer1
-new hw-timer-arm/ref-sched timer2
 
 # Scheduler
 
@@ -40,56 +34,25 @@ set host-sched num-clients 1
 set host-sched 0-regular? 1
 set host-sched 0-time 50
 
-connect-pin target-sched 0-control <- timer1 divided-clock-control
-connect-pin target-sched 1-control <- timer2 divided-clock-control
-connect-pin target-sched 0-event -> timer1 divided-clock-event
-connect-pin target-sched 1-event -> timer2 divided-clock-event
 connect-pin host-sched 0-event -> stdio poll
 
-# Component relationships
-relate angel cpu cpu
-
 # Main pin connections
 connect-pin main perform-activity -> host-sched advance
 connect-pin main perform-activity -> target-sched advance
 connect-pin main starting -> loader load!
-connect-pin main perform-activity -> cpu step!
 
 # ELF loader
-connect-pin loader start-pc-set -> cpu start-pc-set!
-connect-pin loader endian-set -> cpu endian-set!
 connect-BUS loader load-accessor-data bus access-port  # Error : invalid command
 
-# Gloss support
-connect-pin cpu trap <-> angel trap
-connect-pin cpu trap-code -> angel trap-code
-connect-pin angel process-signal -> main stop!
-connect-pin angel debug-tx -> stdio stdout
-connect-pin angel debug-rx <- stdio stdin
-
-# Interrupts from reference peripherals
-connect-pin timer1 interrupt -> intctrl interrupt-source-4
-connect-pin timer2 interrupt -> intctrl interrupt-source-5
-connect-pin intctrl interrupt -> cpu nirq
-connect-pin intctrl fast-interrupt -> cpu nfiq
-
 # Alter this attribute to get more available system RAM.
 set mem size 8388608
 
 # Attributes
 set loader file hello
-set cpu engine-type scache
-set cpu step-insn-count 1000
 
 # Bus connections
 connect-bus hw-remap/pause-arm/ref all bus access-port # Error : invalid component name
-connect-bus cpu insn-memory remappers access-port      # Error : component does not exist
+connect-bus bus [0,0] remappers access-port    # Error : component does not exist
 connect-bus " " data-memory " " access-port            # Error : missing component name
 connect-bus set target-memory remapper access-port     # Error : invalid component name
 connect-bus bus1 [0,0x7fffff] mem read-write-port      # Error : component does not exist
-connect-bus bus [0xA000000,0xA000013] intctrl irq-registers
-connect-bus bus [0xA000100,0xA00010F] intctrl fiq-registers
-connect-bus bus [0xA800000,0xA80000F] timer1 registers
-connect-bus bus [0xA800020,0xA80002F] timer2 registers
-connect-bus bus [0xB000000,0xB000037] remapper registers
-

diff --git a/sid/component/testsuite/sidcomp.cfgroot/CBinvaComp.expect b/sid/component/testsuite/sidcomp.cfgroot/CBinvaComp.expect
index b23d4e0..3e2ea53 100644 (file)
--- a/sid/component/testsuite/sidcomp.cfgroot/CBinvaComp.expect
+++ b/sid/component/testsuite/sidcomp.cfgroot/CBinvaComp.expect
@@ -1,12 +1,12 @@
-CBinvaComp.badconf:61: unknown command connect-BUS
-CBinvaComp.badconf:61: unknown command loader
-CBinvaComp.badconf:61: unknown command load-accessor-data
-CBinvaComp.badconf:61: unknown command bus
-CBinvaComp.badconf:61: unknown command access-port
-CBinvaComp.badconf:85: component hw-remap/pause-arm/ref not found
-CBinvaComp.badconf:86: component remappers not found
-CBinvaComp.badconf:87: component   not found
-CBinvaComp.badconf:88: component set not found
-CBinvaComp.badconf:89: component bus1 not found
-CBinvaComp.badconf:90: component BUS not found
+CBinvaComp.badconf:45: unknown command connect-BUS
+CBinvaComp.badconf:45: unknown command loader
+CBinvaComp.badconf:45: unknown command load-accessor-data
+CBinvaComp.badconf:45: unknown command bus
+CBinvaComp.badconf:45: unknown command access-port
+CBinvaComp.badconf:54: component hw-remap/pause-arm/ref not found
+CBinvaComp.badconf:55: component remappers not found
+CBinvaComp.badconf:56: component   not found
+CBinvaComp.badconf:57: component set not found
+CBinvaComp.badconf:58: component bus1 not found
+CBinvaComp.badconf:59: component BUS not found
 Configuration error.  Aborting.

diff --git a/sid/component/testsuite/sidcomp.cfgroot/dupName.badconf b/sid/component/testsuite/sidcomp.cfgroot/dupName.badconf
index ba8d4a4..7609a40 100644 (file)
--- a/sid/component/testsuite/sidcomp.cfgroot/dupName.badconf
+++ b/sid/component/testsuite/sidcomp.cfgroot/dupName.badconf
@@ -19,8 +19,8 @@ load libtimers.la timer_component_library
 
 # Components
 
-new hw-cpu-arm7t cpu
-new hw-cpu-arm7t cpu                   # same component, same name
+new hw-mapper-basic mapper
+new hw-mapper-basic mapper             # same component, same name
 new sw-load-elf loader
 new sid-io-stdio stdio
 new sid-io-stdio loader                        # different component, same name

diff --git a/sid/component/testsuite/sidcomp.cfgroot/dupName.expect b/sid/component/testsuite/sidcomp.cfgroot/dupName.expect
index c94ae3f..8ac6729 100644 (file)
--- a/sid/component/testsuite/sidcomp.cfgroot/dupName.expect
+++ b/sid/component/testsuite/sidcomp.cfgroot/dupName.expect
@@ -1,3 +1,3 @@
-dupName.badconf:23: component cpu already exists.
+dupName.badconf:23: component mapper already exists.
 dupName.badconf:26: component loader already exists.
 Configuration error.  Aborting.

diff --git a/sid/component/testsuite/sidcomp.cfgroot/multiDso.badconf b/sid/component/testsuite/sidcomp.cfgroot/multiDso.badconf
index 1703d55..b2108c8 100644 (file)
--- a/sid/component/testsuite/sidcomp.cfgroot/multiDso.badconf
+++ b/sid/component/testsuite/sidcomp.cfgroot/multiDso.badconf
@@ -21,18 +21,12 @@ load libconsoles1.la console_component_library1     # error
 
 # Components
 
-new hw-cpu-arm7t cpu
 new sw-load-elf loader
 new sid-io-stdio stdio
-new sw-gloss-arm/angel angel
-new hw-interrupt-arm/ref intctrl
 new hw-mapper-basic bus
-new hw-remap/pause-arm/ref remapper
 new sid-sched-host host-sched
 new sid-sched-sim target-sched
 new hw-memory-ram/rom-basic mem
-new hw-timer-arm/ref-sched timer1
-new hw-timer-arm/ref-sched timer2
 
 load libinterrupt.la interrupt_component_library       # duplicate
 # Scheduler
@@ -45,59 +39,25 @@ set host-sched num-clients 1
 set host-sched 0-regular? 1
 set host-sched 0-time 50
 
-connect-pin target-sched 0-control <- timer1 divided-clock-control
-connect-pin target-sched 1-control <- timer2 divided-clock-control
-connect-pin target-sched 0-event -> timer1 divided-clock-event
-connect-pin target-sched 1-event -> timer2 divided-clock-event
 connect-pin host-sched 0-event -> stdio poll
 
-# Component relationships
-relate angel cpu cpu
-
 # Main pin connections
 connect-pin main perform-activity -> host-sched advance
 connect-pin main perform-activity -> target-sched advance
 connect-pin main starting -> loader load!
-connect-pin main perform-activity -> cpu step!
 
 # ELF loader
-connect-pin loader start-pc-set -> cpu start-pc-set!
-connect-pin loader endian-set -> cpu endian-set!
 connect-bus loader load-accessor-data bus access-port
 
-# Gloss support
-connect-pin cpu trap <-> angel trap
-connect-pin cpu trap-code -> angel trap-code
-connect-pin angel process-signal -> main stop!
-connect-pin angel debug-tx -> stdio stdout
-connect-pin angel debug-rx <- stdio stdin
-
 load libinterrupt.la interrupt_component_library       # duplicate
 
-# Interrupts from reference peripherals
-connect-pin timer1 interrupt -> intctrl interrupt-source-4
-connect-pin timer2 interrupt -> intctrl interrupt-source-5
-connect-pin intctrl interrupt -> cpu nirq
-connect-pin intctrl fast-interrupt -> cpu nfiq
-
 # Alter this attribute to get more available system RAM.
 set mem size 8388608
 
 # Attributes
 set loader file hello
-set cpu engine-type scache
-set cpu step-insn-count 1000
 
 # Bus connections
-connect-bus remapper all bus access-port
-connect-bus cpu insn-memory remapper access-port
-connect-bus cpu data-memory remapper access-port
-connect-bus angel target-memory remapper access-port
 connect-bus bus [0,0x7fffff] mem read-write-port
-connect-bus bus [0xA000000,0xA000013] intctrl irq-registers
-connect-bus bus [0xA000100,0xA00010F] intctrl fiq-registers
-connect-bus bus [0xA800000,0xA80000F] timer1 registers
-connect-bus bus [0xA800020,0xA80002F] timer2 registers
-connect-bus bus [0xB000000,0xB000037] remapper registers
 
 load libinterrupt.la interrupt_component_library       # duplicate