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drm/i915/adl_s: Add PHYs for Alderlake S
authorAnusha Srivatsa <anusha.srivatsa@intel.com>
Mon, 25 Jan 2021 14:07:47 +0000 (06:07 -0800)
committerLucas De Marchi <lucas.demarchi@intel.com>
Tue, 26 Jan 2021 15:10:45 +0000 (07:10 -0800)
Alderlake-S has 5 combo phys, add reg definitions for
combo phys and update the port to phy helper for ADL-S.

v2:
- Change IS_GEN() >= 12 to IS_TIGERLAKE() in intel_phy_is_tc()
and return false for platforms RKL,DG1 and ADLS.(mdroper)

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210125140753.347998-5-aditya.swarup@intel.com
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/i915_reg.h

index 0189d37..1eae92e 100644 (file)
@@ -6935,6 +6935,8 @@ bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy)
 {
        if (phy == PHY_NONE)
                return false;
+       else if (IS_ALDERLAKE_S(dev_priv))
+               return phy <= PHY_E;
        else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
                return phy <= PHY_D;
        else if (IS_JSL_EHL(dev_priv))
@@ -6947,11 +6949,9 @@ bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy)
 
 bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)
 {
-       if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
-               return false;
-       else if (INTEL_GEN(dev_priv) >= 12)
+       if (IS_TIGERLAKE(dev_priv))
                return phy >= PHY_D && phy <= PHY_I;
-       else if (INTEL_GEN(dev_priv) >= 11 && !IS_JSL_EHL(dev_priv))
+       else if (IS_ICELAKE(dev_priv))
                return phy >= PHY_C && phy <= PHY_F;
        else
                return false;
@@ -6959,7 +6959,9 @@ bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)
 
 enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port)
 {
-       if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1)
+       if (IS_ALDERLAKE_S(i915) && port >= PORT_TC1)
+               return PHY_B + port - PORT_TC1;
+       else if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1)
                return PHY_C + port - PORT_TC1;
        else if (IS_JSL_EHL(i915) && port == PORT_D)
                return PHY_A;
index 1d8ba10..56ba8f1 100644 (file)
@@ -1874,10 +1874,13 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define _ICL_COMBOPHY_B                        0x6C000
 #define _EHL_COMBOPHY_C                        0x160000
 #define _RKL_COMBOPHY_D                        0x161000
+#define _ADL_COMBOPHY_E                        0x16B000
+
 #define _ICL_COMBOPHY(phy)             _PICK(phy, _ICL_COMBOPHY_A, \
                                              _ICL_COMBOPHY_B, \
                                              _EHL_COMBOPHY_C, \
-                                             _RKL_COMBOPHY_D)
+                                             _RKL_COMBOPHY_D, \
+                                             _ADL_COMBOPHY_E)
 
 /* CNL/ICL Port CL_DW registers */
 #define _ICL_PORT_CL_DW(dw, phy)       (_ICL_COMBOPHY(phy) + \