Tab completion is our friend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11957 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Sparc/Sparc.td b/lib/Target/Sparc/Sparc.td
index 345ea4d..7607dca 100644 (file)
--- a/lib/Target/Sparc/Sparc.td
+++ b/lib/Target/Sparc/Sparc.td
@@ -18,8 +18,8 @@ include "../Target.td"
 // Register File Description
 //===----------------------------------------------------------------------===//
 
-include "SparcV8Reg.td"
-include "SparcV8Instrs.td"
+include "SparcV8RegisterInfo.td"
+include "SparcV8InstrInfo.td"
 
 def SparcV8InstrInfo : InstrInfo {
   let PHIInst  = PHI;

diff --git a/lib/Target/Sparc/SparcV8Instrs.td b/lib/Target/Sparc/SparcInstrInfo.td
similarity index 97%
rename from lib/Target/Sparc/SparcV8Instrs.td
rename to lib/Target/Sparc/SparcInstrInfo.td
index 37b4d74..1d7d973 100644 (file)
--- a/lib/Target/Sparc/SparcV8Instrs.td
+++ b/lib/Target/Sparc/SparcInstrInfo.td
@@ -28,8 +28,8 @@ class InstV8 : Instruction {          // SparcV8 instruction baseline
   bit isPrivileged = 0; // Is this a privileged instruction?
 }
 
-include "SparcV8Instrs_F2.td"
-include "SparcV8Instrs_F3.td"
+include "SparcV8InstrInfo_F2.td"
+include "SparcV8InstrInfo_F3.td"
 
 //===----------------------------------------------------------------------===//
 // Instructions

diff --git a/lib/Target/Sparc/SparcV8Reg.td b/lib/Target/Sparc/SparcRegisterInfo.td
similarity index 100%
rename from lib/Target/Sparc/SparcV8Reg.td
rename to lib/Target/Sparc/SparcRegisterInfo.td

diff --git a/lib/Target/Sparc/SparcV8Instrs_F2.td b/lib/Target/Sparc/SparcV8InstrInfo_F2.td
similarity index 100%
rename from lib/Target/Sparc/SparcV8Instrs_F2.td
rename to lib/Target/Sparc/SparcV8InstrInfo_F2.td

diff --git a/lib/Target/Sparc/SparcV8Instrs_F3.td b/lib/Target/Sparc/SparcV8InstrInfo_F3.td
similarity index 100%
rename from lib/Target/Sparc/SparcV8Instrs_F3.td
rename to lib/Target/Sparc/SparcV8InstrInfo_F3.td

diff --git a/lib/Target/SparcV8/SparcV8.td b/lib/Target/SparcV8/SparcV8.td
index 345ea4d..7607dca 100644 (file)
--- a/lib/Target/SparcV8/SparcV8.td
+++ b/lib/Target/SparcV8/SparcV8.td
@@ -18,8 +18,8 @@ include "../Target.td"
 // Register File Description
 //===----------------------------------------------------------------------===//
 
-include "SparcV8Reg.td"
-include "SparcV8Instrs.td"
+include "SparcV8RegisterInfo.td"
+include "SparcV8InstrInfo.td"
 
 def SparcV8InstrInfo : InstrInfo {
   let PHIInst  = PHI;

diff --git a/lib/Target/SparcV8/SparcV8Instrs.td b/lib/Target/SparcV8/SparcV8InstrInfo.td
similarity index 97%
rename from lib/Target/SparcV8/SparcV8Instrs.td
rename to lib/Target/SparcV8/SparcV8InstrInfo.td
index 37b4d74..1d7d973 100644 (file)
--- a/lib/Target/SparcV8/SparcV8Instrs.td
+++ b/lib/Target/SparcV8/SparcV8InstrInfo.td
@@ -28,8 +28,8 @@ class InstV8 : Instruction {          // SparcV8 instruction baseline
   bit isPrivileged = 0; // Is this a privileged instruction?
 }
 
-include "SparcV8Instrs_F2.td"
-include "SparcV8Instrs_F3.td"
+include "SparcV8InstrInfo_F2.td"
+include "SparcV8InstrInfo_F3.td"
 
 //===----------------------------------------------------------------------===//
 // Instructions

diff --git a/lib/Target/SparcV8/SparcV8Instrs_F2.td b/lib/Target/SparcV8/SparcV8InstrInfo_F2.td
similarity index 100%
rename from lib/Target/SparcV8/SparcV8Instrs_F2.td
rename to lib/Target/SparcV8/SparcV8InstrInfo_F2.td

diff --git a/lib/Target/SparcV8/SparcV8Instrs_F3.td b/lib/Target/SparcV8/SparcV8InstrInfo_F3.td
similarity index 100%
rename from lib/Target/SparcV8/SparcV8Instrs_F3.td
rename to lib/Target/SparcV8/SparcV8InstrInfo_F3.td

diff --git a/lib/Target/SparcV8/SparcV8Reg.td b/lib/Target/SparcV8/SparcV8RegisterInfo.td
similarity index 100%
rename from lib/Target/SparcV8/SparcV8Reg.td
rename to lib/Target/SparcV8/SparcV8RegisterInfo.td