drm/i915: Add crtc .crtc_get_shared_dpll()

Start splitting the .compute_crtc_clock() into two parts; one
part does the computation, the second part does the shared dpll
assignment. I want to move the actual computation part much earlier
into the compute_config() phase.

v2: dg2_crtc_get_shared_dpll() not needed (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220325123205.22140-10-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d3aff02..3266310 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4908,6 +4908,10 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
                ret = intel_dpll_crtc_compute_clock(state, crtc);
                if (ret)
                        return ret;
+
+               ret = intel_dpll_crtc_get_shared_dpll(state, crtc);
+               if (ret)
+                       return ret;
        }
 
        /*

diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index bc59efe..6eef0b8 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -20,6 +20,8 @@
 struct intel_dpll_funcs {
        int (*crtc_compute_clock)(struct intel_atomic_state *state,
                                  struct intel_crtc *crtc);
+       int (*crtc_get_shared_dpll)(struct intel_atomic_state *state,
+                                   struct intel_crtc *crtc);
 };
 
 struct intel_limit {
@@ -931,6 +933,12 @@ static void i8xx_compute_dpll(struct intel_crtc_state *crtc_state,
 static int hsw_crtc_compute_clock(struct intel_atomic_state *state,
                                  struct intel_crtc *crtc)
 {
+       return 0;
+}
+
+static int hsw_crtc_get_shared_dpll(struct intel_atomic_state *state,
+                                   struct intel_crtc *crtc)
+{
        struct drm_i915_private *dev_priv = to_i915(state->base.dev);
        struct intel_crtc_state *crtc_state =
                intel_atomic_get_new_crtc_state(state, crtc);
@@ -1087,7 +1095,6 @@ static int ilk_crtc_compute_clock(struct intel_atomic_state *state,
                intel_atomic_get_new_crtc_state(state, crtc);
        const struct intel_limit *limit;
        int refclk = 120000;
-       int ret;
 
        /* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
        if (!crtc_state->has_pch_encoder)
@@ -1127,6 +1134,21 @@ static int ilk_crtc_compute_clock(struct intel_atomic_state *state,
        ilk_compute_dpll(crtc_state, &crtc_state->dpll,
                         &crtc_state->dpll);
 
+       return 0;
+}
+
+static int ilk_crtc_get_shared_dpll(struct intel_atomic_state *state,
+                                   struct intel_crtc *crtc)
+{
+       struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+       struct intel_crtc_state *crtc_state =
+               intel_atomic_get_new_crtc_state(state, crtc);
+       int ret;
+
+       /* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
+       if (!crtc_state->has_pch_encoder)
+               return 0;
+
        ret = intel_reserve_shared_dplls(state, crtc, NULL);
        if (ret) {
                drm_dbg_kms(&dev_priv->drm,
@@ -1376,10 +1398,12 @@ static const struct intel_dpll_funcs dg2_dpll_funcs = {
 
 static const struct intel_dpll_funcs hsw_dpll_funcs = {
        .crtc_compute_clock = hsw_crtc_compute_clock,
+       .crtc_get_shared_dpll = hsw_crtc_get_shared_dpll,
 };
 
 static const struct intel_dpll_funcs ilk_dpll_funcs = {
        .crtc_compute_clock = ilk_crtc_compute_clock,
+       .crtc_get_shared_dpll = ilk_crtc_get_shared_dpll,
 };
 
 static const struct intel_dpll_funcs chv_dpll_funcs = {
@@ -1427,6 +1451,27 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
        return i915->dpll_funcs->crtc_compute_clock(state, crtc);
 }
 
+int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
+                                   struct intel_crtc *crtc)
+{
+       struct drm_i915_private *i915 = to_i915(state->base.dev);
+       struct intel_crtc_state *crtc_state =
+               intel_atomic_get_new_crtc_state(state, crtc);
+
+       drm_WARN_ON(&i915->drm, !intel_crtc_needs_modeset(crtc_state));
+
+       if (drm_WARN_ON(&i915->drm, crtc_state->shared_dpll))
+               return 0;
+
+       if (!crtc_state->hw.enable)
+               return 0;
+
+       if (!i915->dpll_funcs->crtc_get_shared_dpll)
+               return 0;
+
+       return i915->dpll_funcs->crtc_get_shared_dpll(state, crtc);
+}
+
 void
 intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv)
 {

diff --git a/drivers/gpu/drm/i915/display/intel_dpll.h b/drivers/gpu/drm/i915/display/intel_dpll.h
index e9731b2..bbc3054 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dpll.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll.h
@@ -18,6 +18,8 @@ enum pipe;
 void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv);
 int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
                                  struct intel_crtc *crtc);
+int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
+                                   struct intel_crtc *crtc);
 int vlv_calc_dpll_params(int refclk, struct dpll *clock);
 int pnv_calc_dpll_params(int refclk, struct dpll *clock);
 int i9xx_calc_dpll_params(int refclk, struct dpll *clock);