+2001-12-27 Frank Ch. Eigler <fche@redhat.com>
+
+ * configrun-sid.in: Make cpu<->sched pin connections for time queries.
+
2001-12-17 matthew green <mrg@redhat.com>
* Makefile.am (FAM10SCRIPTS): Add Xstormy16 support.
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
";
+2001-12-27 Frank Ch. Eigler <fche@redhat.com>
+
+ * ALL.conf: Regenerated with cpu/sched etc. changes.
+
2001-12-17 matthew green <mrg@redhat.com>
* pregen-configs.in: Add support for Xstormy16.
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
# sid configuration file
-# created by Id: configrun-sid.in,v 1.99 2001/10/29 17:44:36 fche Exp
-# run by fche @ tooth (Linux) at Mon Oct 29 13:01:40 EST 2001
+# created by Id: configrun-sid.in,v 1.33 2001/12/17 09:31:17 mrg Exp
+# run by fche @ tooth (Linux) at Fri Dec 28 15:53:51 EST 2001
# args: --cpu=x86 --no-run --gdb=5000
load libaudio.la audio_component_library
load libcache.la cache_component_library
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
# sid configuration file
-# created by Id: configrun-sid.in,v 1.99 2001/10/29 17:44:36 fche Exp
-# run by fche @ tooth (Linux) at Mon Oct 29 13:01:39 EST 2001
+# created by Id: configrun-sid.in,v 1.33 2001/12/17 09:31:17 mrg Exp
+# run by fche @ tooth (Linux) at Fri Dec 28 15:53:51 EST 2001
# args: --cpu=x86 --no-run a.out
load libaudio.la audio_component_library
load libcache.la cache_component_library
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
# sid configuration file
-# created by Id: configrun-sid.in,v 1.32 2001/12/04 22:40:52 fche Exp
-# run by mrg @ crocodile-dances.eterna.com.au (SunOS) at Mon Dec 17 16:31:03 EST 2001
+# created by Id: configrun-sid.in,v 1.33 2001/12/17 09:31:17 mrg Exp
+# run by fche @ tooth (Linux) at Fri Dec 28 15:53:51 EST 2001
# args: --cpu=xstormy16 --no-run --gdb=5000
load libaudio.la audio_component_library
load libcache.la cache_component_library
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
# sid configuration file
-# created by Id: configrun-sid.in,v 1.32 2001/12/04 22:40:52 fche Exp
-# run by mrg @ crocodile-dances.eterna.com.au (SunOS) at Mon Dec 17 16:31:04 EST 2001
+# created by Id: configrun-sid.in,v 1.33 2001/12/17 09:31:17 mrg Exp
+# run by fche @ tooth (Linux) at Fri Dec 28 15:53:52 EST 2001
# args: --cpu=xstormy16 --no-run --gdb=5000 --tksm
load libaudio.la audio_component_library
load libcache.la cache_component_library
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
# sid configuration file
-# created by Id: configrun-sid.in,v 1.32 2001/12/04 22:40:52 fche Exp
-# run by mrg @ crocodile-dances.eterna.com.au (SunOS) at Mon Dec 17 16:31:04 EST 2001
+# created by Id: configrun-sid.in,v 1.33 2001/12/17 09:31:17 mrg Exp
+# run by fche @ tooth (Linux) at Fri Dec 28 15:53:51 EST 2001
# args: --cpu=xstormy16 --no-run --gdb=5000 --board=gloss-tty
load libaudio.la audio_component_library
load libcache.la cache_component_library
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
# sid configuration file
-# created by Id: configrun-sid.in,v 1.32 2001/12/04 22:40:52 fche Exp
-# run by mrg @ crocodile-dances.eterna.com.au (SunOS) at Mon Dec 17 16:31:03 EST 2001
+# created by Id: configrun-sid.in,v 1.33 2001/12/17 09:31:17 mrg Exp
+# run by fche @ tooth (Linux) at Fri Dec 28 15:53:51 EST 2001
# args: --cpu=xstormy16 --no-run a.out
load libaudio.la audio_component_library
load libcache.la cache_component_library
connect-pin hw-reset-net output-0 -> cpu reset!
connect-pin target-sched 0-event -> cpu step!
connect-pin target-sched 0-control <- cpu step-cycles
+connect-pin target-sched time-query <- cpu time-query
+connect-pin target-sched time-high -> cpu time-high
+connect-pin target-sched time-low -> cpu time-low
connect-pin yield-net output-0 -> cpu yield
connect-pin yield-net output-0 -> host-sched yield
connect-bus cpu insn-memory cpu-mapper access-port
+2001-12-27 Frank Ch. Eigler <fche@redhat.com>
+
+ * cgen-cpu.h (cgen_bi_endian_cpu): Make trace_count a host_int_8.
+ * compCGEN.cxx (cgen_read_memory): Don't distort memory latency
+
2001-12-18 Dave Brolley <brolley@redhat.com>
* cgen-ops.h (ROLHI): New macro.
static int cgen_symbol_at_address(bfd_vma addr, struct disassemble_info * info);
// Counter tracing support
void trace_counter (PCADDR pc);
- int trace_count;
+ host_int_8 trace_count;
public:
cgen_bi_endian_cpu ();
{
cgen_bi_endian_cpu *thisp = static_cast<cgen_bi_endian_cpu *>(info->application_data);
+ // We don't want to penalize the disassembler with memory latency counts, so we
+ // store it away here ...
+ host_int_8 prev_latency = thisp->total_latency;
+
switch (length) {
#if 0 // XXX not sure if this has byte order dependancies or not
case 1:
for (int i = 0; i < length; i++)
*(myaddr + i) = thisp->read_insn_memory_1(0, memaddr + i);
}
+
+ // ... and restore it here.
+ thisp->total_latency = prev_latency;
+
return 0;
}
void
cgen_bi_endian_cpu::trace_counter (PCADDR pc)
{
- this->trace_stream << this->trace_count++ << "\t";
+ this->trace_stream
+ << this->trace_count++ << ' '
+ << (this->sched_query.now()-1) << '\t';
+
+ // Invalidate any local icaches; they distort approximate cycle counting.
+ this->flush_icache (pc);
}
\f
+2001-12-27 Frank Ch. Eigler <fche@redhat.com>
+
+ * sidcpuutil.h (basic_cpu): Add scheduler_time_query member.
+ Add flush_icache(PC) virtual function.
+
2001-12-04 Ben Elliston <bje@redhat.com>
* sidbusutil.h (ro_value_control_register::operator=): Bug
#include <sidcomputil.h>
#include <sidmiscutil.h>
#include <sidwatchutil.h>
+#include <sidschedutil.h>
using std::string;
protected:
recursion_limited step_limit;
+ // scheduler querying
+ protected:
+ friend class scheduler_time_query<basic_cpu>;
+ scheduler_time_query<basic_cpu> sched_query;
+
// triggerpoint support
protected:
friend class self_watcher<basic_cpu>;
}
// step/yield control pins
- private:
+ protected:
callback_pin<basic_cpu> step_pin;
callback_pin<basic_cpu> yield_pin;
bool yield_p;
// Flush internal abstract icache (if any)
private:
callback_pin<basic_cpu> flush_icache_pin;
- virtual void flush_icache () = 0;
void flush_icache_pin_handler(sid::host_int_4 v) { this->flush_icache(); }
+ protected:
+ virtual void flush_icache () = 0;
+ virtual void flush_icache (sid::host_int_4 pc) { this->flush_icache (); }
// Set the initial PC after reset
private:
basic_cpu ():
total_latency (0),
step_limit ("instruction stepping", 1),
+ sched_query (this),
triggerpoint_manager (this),
step_pin (this, & basic_cpu::step_pin_handler),
yield_pin (this, & basic_cpu::yield_pin_handler),