net: stmmac: Uniformize the use of dma_{rx/tx}_mode callbacks

Instead of relying on the GMAC version for choosing if we need to use
dma_{rx/tx}_mode or just dma_mode callback lets uniformize this and
always use the dma_{rx/tx}_mode callbacks.

Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Joao Pinto <jpinto@synopsys.com>
Cc: Vitor Soares <soares@synopsys.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 2f7f091..11c287a 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -437,13 +437,36 @@ static int sun8i_dwmac_dma_interrupt(void __iomem *ioaddr,
        return ret;
 }
 
-static void sun8i_dwmac_dma_operation_mode(void __iomem *ioaddr, int txmode,
-                                          int rxmode, int rxfifosz)
+static void sun8i_dwmac_dma_operation_mode_rx(void __iomem *ioaddr, int mode,
+                                             u32 channel, int fifosz, u8 qmode)
+{
+       u32 v;
+
+       v = readl(ioaddr + EMAC_RX_CTL1);
+       if (mode == SF_DMA_MODE) {
+               v |= EMAC_RX_MD;
+       } else {
+               v &= ~EMAC_RX_MD;
+               v &= ~EMAC_RX_TH_MASK;
+               if (mode < 32)
+                       v |= EMAC_RX_TH_32;
+               else if (mode < 64)
+                       v |= EMAC_RX_TH_64;
+               else if (mode < 96)
+                       v |= EMAC_RX_TH_96;
+               else if (mode < 128)
+                       v |= EMAC_RX_TH_128;
+       }
+       writel(v, ioaddr + EMAC_RX_CTL1);
+}
+
+static void sun8i_dwmac_dma_operation_mode_tx(void __iomem *ioaddr, int mode,
+                                             u32 channel, int fifosz, u8 qmode)
 {
        u32 v;
 
        v = readl(ioaddr + EMAC_TX_CTL1);
-       if (txmode == SF_DMA_MODE) {
+       if (mode == SF_DMA_MODE) {
                v |= EMAC_TX_MD;
                /* Undocumented bit (called TX_NEXT_FRM in BSP), the original
                 * comment is
@@ -454,40 +477,24 @@ static void sun8i_dwmac_dma_operation_mode(void __iomem *ioaddr, int txmode,
        } else {
                v &= ~EMAC_TX_MD;
                v &= ~EMAC_TX_TH_MASK;
-               if (txmode < 64)
+               if (mode < 64)
                        v |= EMAC_TX_TH_64;
-               else if (txmode < 128)
+               else if (mode < 128)
                        v |= EMAC_TX_TH_128;
-               else if (txmode < 192)
+               else if (mode < 192)
                        v |= EMAC_TX_TH_192;
-               else if (txmode < 256)
+               else if (mode < 256)
                        v |= EMAC_TX_TH_256;
        }
        writel(v, ioaddr + EMAC_TX_CTL1);
-
-       v = readl(ioaddr + EMAC_RX_CTL1);
-       if (rxmode == SF_DMA_MODE) {
-               v |= EMAC_RX_MD;
-       } else {
-               v &= ~EMAC_RX_MD;
-               v &= ~EMAC_RX_TH_MASK;
-               if (rxmode < 32)
-                       v |= EMAC_RX_TH_32;
-               else if (rxmode < 64)
-                       v |= EMAC_RX_TH_64;
-               else if (rxmode < 96)
-                       v |= EMAC_RX_TH_96;
-               else if (rxmode < 128)
-                       v |= EMAC_RX_TH_128;
-       }
-       writel(v, ioaddr + EMAC_RX_CTL1);
 }
 
 static const struct stmmac_dma_ops sun8i_dwmac_dma_ops = {
        .reset = sun8i_dwmac_dma_reset,
        .init = sun8i_dwmac_dma_init,
        .dump_regs = sun8i_dwmac_dump_regs,
-       .dma_mode = sun8i_dwmac_dma_operation_mode,
+       .dma_rx_mode = sun8i_dwmac_dma_operation_mode_rx,
+       .dma_tx_mode = sun8i_dwmac_dma_operation_mode_tx,
        .enable_dma_transmission = sun8i_dwmac_enable_dma_transmission,
        .enable_dma_irq = sun8i_dwmac_enable_dma_irq,
        .disable_dma_irq = sun8i_dwmac_disable_dma_irq,

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
index 7ecf549..d7447b0 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
@@ -148,12 +148,40 @@ static u32 dwmac1000_configure_fc(u32 csr6, int rxfifosz)
        return csr6;
 }
 
-static void dwmac1000_dma_operation_mode(void __iomem *ioaddr, int txmode,
-                                        int rxmode, int rxfifosz)
+static void dwmac1000_dma_operation_mode_rx(void __iomem *ioaddr, int mode,
+                                           u32 channel, int fifosz, u8 qmode)
 {
        u32 csr6 = readl(ioaddr + DMA_CONTROL);
 
-       if (txmode == SF_DMA_MODE) {
+       if (mode == SF_DMA_MODE) {
+               pr_debug("GMAC: enable RX store and forward mode\n");
+               csr6 |= DMA_CONTROL_RSF;
+       } else {
+               pr_debug("GMAC: disable RX SF mode (threshold %d)\n", mode);
+               csr6 &= ~DMA_CONTROL_RSF;
+               csr6 &= DMA_CONTROL_TC_RX_MASK;
+               if (mode <= 32)
+                       csr6 |= DMA_CONTROL_RTC_32;
+               else if (mode <= 64)
+                       csr6 |= DMA_CONTROL_RTC_64;
+               else if (mode <= 96)
+                       csr6 |= DMA_CONTROL_RTC_96;
+               else
+                       csr6 |= DMA_CONTROL_RTC_128;
+       }
+
+       /* Configure flow control based on rx fifo size */
+       csr6 = dwmac1000_configure_fc(csr6, fifosz);
+
+       writel(csr6, ioaddr + DMA_CONTROL);
+}
+
+static void dwmac1000_dma_operation_mode_tx(void __iomem *ioaddr, int mode,
+                                           u32 channel, int fifosz, u8 qmode)
+{
+       u32 csr6 = readl(ioaddr + DMA_CONTROL);
+
+       if (mode == SF_DMA_MODE) {
                pr_debug("GMAC: enable TX store and forward mode\n");
                /* Transmit COE type 2 cannot be done in cut-through mode. */
                csr6 |= DMA_CONTROL_TSF;
@@ -162,42 +190,22 @@ static void dwmac1000_dma_operation_mode(void __iomem *ioaddr, int txmode,
                 */
                csr6 |= DMA_CONTROL_OSF;
        } else {
-               pr_debug("GMAC: disabling TX SF (threshold %d)\n", txmode);
+               pr_debug("GMAC: disabling TX SF (threshold %d)\n", mode);
                csr6 &= ~DMA_CONTROL_TSF;
                csr6 &= DMA_CONTROL_TC_TX_MASK;
                /* Set the transmit threshold */
-               if (txmode <= 32)
+               if (mode <= 32)
                        csr6 |= DMA_CONTROL_TTC_32;
-               else if (txmode <= 64)
+               else if (mode <= 64)
                        csr6 |= DMA_CONTROL_TTC_64;
-               else if (txmode <= 128)
+               else if (mode <= 128)
                        csr6 |= DMA_CONTROL_TTC_128;
-               else if (txmode <= 192)
+               else if (mode <= 192)
                        csr6 |= DMA_CONTROL_TTC_192;
                else
                        csr6 |= DMA_CONTROL_TTC_256;
        }
 
-       if (rxmode == SF_DMA_MODE) {
-               pr_debug("GMAC: enable RX store and forward mode\n");
-               csr6 |= DMA_CONTROL_RSF;
-       } else {
-               pr_debug("GMAC: disable RX SF mode (threshold %d)\n", rxmode);
-               csr6 &= ~DMA_CONTROL_RSF;
-               csr6 &= DMA_CONTROL_TC_RX_MASK;
-               if (rxmode <= 32)
-                       csr6 |= DMA_CONTROL_RTC_32;
-               else if (rxmode <= 64)
-                       csr6 |= DMA_CONTROL_RTC_64;
-               else if (rxmode <= 96)
-                       csr6 |= DMA_CONTROL_RTC_96;
-               else
-                       csr6 |= DMA_CONTROL_RTC_128;
-       }
-
-       /* Configure flow control based on rx fifo size */
-       csr6 = dwmac1000_configure_fc(csr6, rxfifosz);
-
        writel(csr6, ioaddr + DMA_CONTROL);
 }
 
@@ -258,7 +266,8 @@ const struct stmmac_dma_ops dwmac1000_dma_ops = {
        .init = dwmac1000_dma_init,
        .axi = dwmac1000_dma_axi,
        .dump_regs = dwmac1000_dump_dma_regs,
-       .dma_mode = dwmac1000_dma_operation_mode,
+       .dma_rx_mode = dwmac1000_dma_operation_mode_rx,
+       .dma_tx_mode = dwmac1000_dma_operation_mode_tx,
        .enable_dma_transmission = dwmac_enable_dma_transmission,
        .enable_dma_irq = dwmac_enable_dma_irq,
        .disable_dma_irq = dwmac_disable_dma_irq,

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
index 6502b9a..80339d3 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
@@ -51,14 +51,14 @@ static void dwmac100_dma_init(void __iomem *ioaddr,
  * The transmit threshold can be programmed by setting the TTC bits in the DMA
  * control register.
  */
-static void dwmac100_dma_operation_mode(void __iomem *ioaddr, int txmode,
-                                       int rxmode, int rxfifosz)
+static void dwmac100_dma_operation_mode_tx(void __iomem *ioaddr, int mode,
+                                          u32 channel, int fifosz, u8 qmode)
 {
        u32 csr6 = readl(ioaddr + DMA_CONTROL);
 
-       if (txmode <= 32)
+       if (mode <= 32)
                csr6 |= DMA_CONTROL_TTC_32;
-       else if (txmode <= 64)
+       else if (mode <= 64)
                csr6 |= DMA_CONTROL_TTC_64;
        else
                csr6 |= DMA_CONTROL_TTC_128;
@@ -113,7 +113,7 @@ const struct stmmac_dma_ops dwmac100_dma_ops = {
        .reset = dwmac_dma_reset,
        .init = dwmac100_dma_init,
        .dump_regs = dwmac100_dump_dma_regs,
-       .dma_mode = dwmac100_dma_operation_mode,
+       .dma_tx_mode = dwmac100_dma_operation_mode_tx,
        .dma_diagnostic_fr = dwmac100_dma_diagnostic_fr,
        .enable_dma_transmission = dwmac_enable_dma_transmission,
        .enable_dma_irq = dwmac_enable_dma_irq,

diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h
index a6b9c97..3ff4afe 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/hwif.h
+++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h
@@ -153,10 +153,6 @@ struct stmmac_dma_ops {
        void (*axi)(void __iomem *ioaddr, struct stmmac_axi *axi);
        /* Dump DMA registers */
        void (*dump_regs)(void __iomem *ioaddr, u32 *reg_space);
-       /* Set tx/rx threshold in the csr6 register
-        * An invalid value enables the store-and-forward mode */
-       void (*dma_mode)(void __iomem *ioaddr, int txmode, int rxmode,
-                        int rxfifosz);
        void (*dma_rx_mode)(void __iomem *ioaddr, int mode, u32 channel,
                            int fifosz, u8 qmode);
        void (*dma_tx_mode)(void __iomem *ioaddr, int mode, u32 channel,
@@ -199,8 +195,6 @@ struct stmmac_dma_ops {
        stmmac_do_void_callback(__priv, dma, axi, __args)
 #define stmmac_dump_dma_regs(__priv, __args...) \
        stmmac_do_void_callback(__priv, dma, dump_regs, __args)
-#define stmmac_dma_mode(__priv, __args...) \
-       stmmac_do_void_callback(__priv, dma, dma_mode, __args)
 #define stmmac_dma_rx_mode(__priv, __args...) \
        stmmac_do_void_callback(__priv, dma, dma_rx_mode, __args)
 #define stmmac_dma_tx_mode(__priv, __args...) \

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 0ccee6a..beb7ec1 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1787,22 +1787,18 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
        }
 
        /* configure all channels */
-       if (priv->synopsys_id >= DWMAC_CORE_4_00) {
-               for (chan = 0; chan < rx_channels_count; chan++) {
-                       qmode = priv->plat->rx_queues_cfg[chan].mode_to_use;
+       for (chan = 0; chan < rx_channels_count; chan++) {
+               qmode = priv->plat->rx_queues_cfg[chan].mode_to_use;
 
-                       stmmac_dma_rx_mode(priv, priv->ioaddr, rxmode, chan,
-                                       rxfifosz, qmode);
-               }
+               stmmac_dma_rx_mode(priv, priv->ioaddr, rxmode, chan,
+                               rxfifosz, qmode);
+       }
 
-               for (chan = 0; chan < tx_channels_count; chan++) {
-                       qmode = priv->plat->tx_queues_cfg[chan].mode_to_use;
+       for (chan = 0; chan < tx_channels_count; chan++) {
+               qmode = priv->plat->tx_queues_cfg[chan].mode_to_use;
 
-                       stmmac_dma_tx_mode(priv, priv->ioaddr, txmode, chan,
-                                       txfifosz, qmode);
-               }
-       } else {
-               stmmac_dma_mode(priv, priv->ioaddr, txmode, rxmode, rxfifosz);
+               stmmac_dma_tx_mode(priv, priv->ioaddr, txmode, chan,
+                               txfifosz, qmode);
        }
 }
 
@@ -1971,14 +1967,8 @@ static void stmmac_set_dma_operation_mode(struct stmmac_priv *priv, u32 txmode,
        rxfifosz /= rx_channels_count;
        txfifosz /= tx_channels_count;
 
-       if (priv->synopsys_id >= DWMAC_CORE_4_00) {
-               stmmac_dma_rx_mode(priv, priv->ioaddr, rxmode, chan, rxfifosz,
-                               rxqmode);
-               stmmac_dma_tx_mode(priv, priv->ioaddr, txmode, chan, txfifosz,
-                               txqmode);
-       } else {
-               stmmac_dma_mode(priv, priv->ioaddr, txmode, rxmode, rxfifosz);
-       }
+       stmmac_dma_rx_mode(priv, priv->ioaddr, rxmode, chan, rxfifosz, rxqmode);
+       stmmac_dma_tx_mode(priv, priv->ioaddr, txmode, chan, txfifosz, txqmode);
 }
 
 static bool stmmac_safety_feat_interrupt(struct stmmac_priv *priv)