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drm/i915/tgl: Disable rc6 for debugging
authorChris Wilson <chris@chris-wilson.co.uk>
Tue, 10 Sep 2019 16:16:57 +0000 (17:16 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 10 Sep 2019 20:03:25 +0000 (21:03 +0100)
Empirical evidence from CI tells us that our rc6 setup for Tigerlake is
off. Disable rc6 on tgl temporary so that we gain CI coverage as we
prepare a fix. It also appears that the BIOS on our tgl leaves rc6
enabled, so we have to explicitly disable it on init.

References: https://bugs.freedesktop.org/show_bug.cgi?id=111593
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190910161657.23037-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_pm.c

index fbe98a2..b3cc856 100644 (file)
@@ -797,6 +797,7 @@ static const struct intel_device_info intel_tigerlake_12_info = {
        .display.has_modular_fia = 1,
        .engine_mask =
                BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
+       .has_rc6 = false, /* XXX disabled for debugging */
 };
 
 #undef GEN
index 528e90e..54a8b77 100644 (file)
@@ -8671,8 +8671,7 @@ void intel_disable_gt_powersave(struct drm_i915_private *dev_priv)
 {
        mutex_lock(&dev_priv->gt_pm.rps.lock);
 
-       if (HAS_RC6(dev_priv))
-               intel_disable_rc6(dev_priv);
+       intel_disable_rc6(dev_priv);
 
        intel_disable_rps(dev_priv);
        if (HAS_LLC(dev_priv))